changeset f3e9fe1600d6 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=f3e9fe1600d6
description:
arm: make the PseudoLRU tags the default for the O3_ARM_v7aL2
the Cortex-A15 has a random replacement policy for its L2 cache. see the
Cortex-A15 Technical
changeset c00b5ba43967 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=c00b5ba43967
description:
mem: refactor LRU cache tags and add random replacement tags
this patch implements a new tags class that uses a random replacement
policy.
these tags pref
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http://reviews.gem5.org/r/2312/
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(Updated July 28, 2014, 10:29 p.m.)
Review request for Default.
Changes
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This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/2319/
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Review request for Default.
Repository: gem5
Description
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Changeset 10265