changeset b3231fc8ae9d in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=b3231fc8ae9d
description:
mem: Add access statistics for the snoop filter
Adds a simple access counter for requests and snoops for the snoop
filter and
also classifies hits based o
changeset 560aead2320f in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=560aead2320f
description:
tests: Add a memtest version using the ideal SnoopFilter
This patch adds a basic regression test for the snoop filter.
diffstat:
tests/SConscript
changeset 3819b85ff21a in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=3819b85ff21a
description:
tests: Use more representative configs for ARM tests
This patch changes the CPU and cache configurations used in the ARM SE
and FS
regressions to make the
changeset 8c80b91944c5 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=8c80b91944c5
description:
stats: Bump stats for filter, crossbar and config changes
This patch bumps the stats to reflect the addition of the snoop filter
and snoop stats, the chang
changeset a9023811bf9e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a9023811bf9e
description:
alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate
activate(), suspend(), and halt() used on thread contexts had an
optional
delay parameter. H
changeset 7a618c07e663 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=7a618c07e663
description:
mem: Rename Bus to XBar to better reflect its behaviour
This patch changes the name of the Bus classes to XBar to better
reflect the actual timing behaviou
changeset 3ab6c2a5a407 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=3ab6c2a5a407
description:
mem: Add a simple snoop counter per bus
This patch adds a simple counter for both total messages and a
histogram for
the fan-out of snoop messages. The f
changeset a59c189de383 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a59c189de383
description:
cpu: Remove unused deallocateContext calls
The call paths for de-scheduling a thread are halt() and suspend(), from
the thread context. There is no call to
changeset c81407818741 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=c81407818741
description:
base: Clean up redundant string functions and use C++11
This patch does a bit of housekeeping on the string helper functions
and relies on the C++11 standa
changeset 0644819fc32f in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=0644819fc32f
description:
mem: Simple Snoop Filter
This is a first cut at a simple snoop filter that tracks presence of
lines in
the caches "above" it. The snoop filter can be appl
changeset 8a7724f13288 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=8a7724f13288
description:
dev: Refactor terminal<->UART interface to make it more generic
The terminal currently assumes that the transport to the guest always
inherits from the Uar
changeset a26a20060ba3 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a26a20060ba3
description:
dev, pci: Implement basic VirtIO support
This patch adds support for VirtIO over the PCI bus. It does so by
providing the following new SimObjects:
changeset 0655a3d869ad in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=0655a3d869ad
description:
misc: Add functions for doing popcount and power-of-two checking
Adds two public domain algorithms for determining number of set bits
and also
whether a v
changeset 4a501e0f7540 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=4a501e0f7540
description:
dev: Add support for 9p proxying over VirtIO
This patch adds support for 9p filesystem proxying over VirtIO. It can
currently operate by connecting to a 9p
changeset 5eede8466691 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=5eede8466691
description:
energy: Memory-mapped Energy Controller component
This patch provides an Energy Controller device that provides software
(driver) access to a DVFS handler.
changeset d65768b9ffc2 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=d65768b9ffc2
description:
energy: Tighter checking of levels for DFS systems
There are cases where users might by accident / intention specify less
voltage
operating points thatn f
changeset 42d0d62ee057 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=42d0d62ee057
description:
dev: Add a VirtIO console device model
diffstat:
src/dev/virtio/SConscript |3 +
src/dev/virtio/VirtIOConsole.py | 51 +
src/dev/virtio/console.c
changeset 3f943443ae30 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=3f943443ae30
description:
base: Add getSectionNames to IniFile
Add an accessor to IniFile to list all the sections in the file.
diffstat:
src/base/inifile.cc | 10 ++
src/base/i
changeset 28bc070b5a86 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=28bc070b5a86
description:
dev: Add a VirtIO block device model
diffstat:
src/dev/virtio/SConscript |3 +
src/dev/virtio/VirtIOBlock.py | 50 +++
src/dev/virtio/block.cc |
changeset 77b9f96786c1 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=77b9f96786c1
description:
energy: Small extentions and fixes for DVFS handler
These additions allow easier interoperability with and querying from an
additional controller which wil
changeset 0fafa62b6c01 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=0fafa62b6c01
description:
mem: Add memory rank-to-rank delay
Add the following delay to the DRAM controller:
- tCS : Different rank bus turnaround delay
This will be appli
changeset b31580e27d1f in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=b31580e27d1f
description:
cpu: Add ExecFlags debug flag
Adds a debug flag to print out the flags a instruction is tagged with.
diffstat:
src/cpu/SConscript | 3 ++-
src/cpu/exetrace.cc
changeset 3064e1beeb49 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=3064e1beeb49
description:
energy: Add the Energy Controller in the right configs
Tie in the newly created energy controller components in the default
configurations.
diffstat:
sr
changeset 0100f00a229e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=0100f00a229e
description:
cpu: Update DRAM traffic gen
Add new DRAM_ROTATE mode to traffic generator.
This mode will generate DRAM traffic that rotates across
banks per rank
changeset 33b4ea05c261 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=33b4ea05c261
description:
mem: Tie in the snoop filter in the coherent bus
diffstat:
src/mem/Bus.py |1 +
src/mem/coherent_bus.cc | 181 +++--
changeset ab8b8601b6ff in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=ab8b8601b6ff
description:
cpu: use probes infrastructure to do simpoint profiling
Instead of having code embedded in cpu model to do simpoint profiling
use
the probes infrastructur
changeset 70cfafa17653 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=70cfafa17653
description:
mem: Add DDR4 bank group timing
Added the following parameter to the DRAMCtrl class:
- bank_groups_per_rank
This defaults to 1. For the DDR4 case
changeset fa66d9c5e180 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=fa66d9c5e180
description:
tests: automatically kill regressions that take too long
When GNU coreutils 'timeout' is available, limit each regression
simulation to 4 hours.
diffstat:
changeset 452a5f178ec5 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=452a5f178ec5
description:
mem: Remove the GHB prefetcher from the source tree
There are two primary issues with this code which make it deserving of
deletion.
1) GHB is a way to s
changeset ec1af95a2958 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=ec1af95a2958
description:
config: Cleanup .json config file generation
This patch 'completes' .json config files generation by adding in the
SimObject references and String-valued p
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing passed.
* build/ALPHA/tests/opt/quick/se/20.eio-short/alpha/eio/simple-timing
passed.
* build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing
passed.
* build/ALPHA/tests/opt/quick/se/30.eio-mp/alpha/eio
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