My apologies for the earlier unintended spam (and this one too).
I was looking into x86 RMW lock support in gem5 classic memory and Steve
seems to be 2 steps ahead on the problem.
On Sun, Mar 15, 2015 at 9:43 PM, Rahul Thakur wrote:
> Steve is doing some x86 locked memory access implementation i
Steve is doing some x86 locked memory access implementation in Timing mode.
I will check how he is doing it. Do you follow gem5-dev?
On Sun, Mar 15, 2015 at 9:00 AM, wrote:
> Send gem5-dev mailing list submissions to
> gem5-dev@gem5.org
>
> To subscribe or unsubscribe via the World Wide
The stats changes all involve the Minor model, and are all due to this
changeset of mine:
http://repo.gem5.org/gem5/rev/4cfe55719da5
One of the things that changeset did, in the process of restructuring how
packets are created, was "replaced the code in the Minor model that was
still doing it the
* build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing CHANGED!
* build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor-dual
CHANGED!
* build/ARM/tests/opt/long/se/30.eon/arm/linux/minor-timing CHANGED!
* build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realv
