[gem5-dev] Cron /z/m5/regression/do-regression quick

2016-07-20 Thread Cron Daemon
* build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest: passed. * build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter: passed. * build/NULL/tests/opt/quick/se/51.memcheck/null/none/memcheck: passed. * build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl

Re: [gem5-dev] Review Request 3547: cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass

2016-07-20 Thread Giacomo Gabrielli
> On July 19, 2016, 2:58 p.m., Jason Lowe-Power wrote: > > configs/common/O3_ARM_v7a.py, line 65 > > > > > > Does this change the performance at all? Is there a need for this > > change? I think there is definitely a need f

Re: [gem5-dev] Review Request 3547: cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass

2016-07-20 Thread Giacomo Gabrielli
> On July 13, 2016, 1:36 p.m., Giacomo Gabrielli wrote: > > Thanks for this contribution, the Float/Simd split for AArch64 makes a lot > > of sense. > > Overall the modifications look great, I only have a couple of comments: > > 1. I'm not sure whether MinorCPU would still work, given the additi

Re: [gem5-dev] Review Request 3502: mem: Split the hit_latency into tag_latency and data_latency

2016-07-20 Thread Sophiane SENNI
> On juin 27, 2016, 5 après-midi, Nikos Nikoleris wrote: > > src/mem/cache/tags/base_set_assoc.hh, line 218 > > > > > > Would it make sense to move most of this code in the constructor? The > > flag sequentialAccess and the

Re: [gem5-dev] Review Request 3547: cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass

2016-07-20 Thread Giacomo Gabrielli
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3547/#review8487 --- Ship it! Ship It! - Giacomo Gabrielli On July 16, 2016, 4:44 p.m., Fe

Re: [gem5-dev] Review Request 3502: mem: Split the hit_latency into tag_latency and data_latency

2016-07-20 Thread Nikos Nikoleris
> On June 27, 2016, 5 p.m., Nikos Nikoleris wrote: > > src/mem/cache/tags/base_set_assoc.hh, line 218 > > > > > > Would it make sense to move most of this code in the constructor? The > > flag sequentialAccess and the condi

Re: [gem5-dev] Review Request 3502: mem: Split the hit_latency into tag_latency and data_latency

2016-07-20 Thread Sophiane SENNI
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3502/ --- (Updated juil. 20, 2016, 1:32 après-midi) Review request for Default. Repository:

Re: [gem5-dev] Review Request 3565: arm, config: Add an example ARM big.LITTLE(tm) configuration script

2016-07-20 Thread Jason Lowe-Power
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3565/#review8489 --- I really like how these new config files are nice and encapsulated! I thi