Re: [gem5-dev] Review Request 2691: mem: implement x86 locked accesses in timing-mode classic cache

> On Jan. 5, 2017, 4:32 p.m., Tony Gutierrez wrote: > > Is there anything holding this up from being shipped? > > Andreas Hansson wrote: > In my view the patch needs two things: > > 1) Some thought around the design. I am still hoping there is a less > invasive way of

Re: [gem5-dev] Review Request 3670: syscall_emul: [patch 4/22] remove redundant M5_pid field from process

> On Oct. 19, 2016, 5:50 p.m., Steve Reinhardt wrote: > > I agree that it's dumb to have two PIDs in the Process object, but until we > > figure out how we really want to fix the auto-assignment thing, it's > > probably premature to push this patch IMO. Let's wait until we have a full > >

Re: [gem5-dev] Review Request 2691: mem: implement x86 locked accesses in timing-mode classic cache

> On Jan. 5, 2017, 8:32 a.m., Tony Gutierrez wrote: > > Is there anything holding this up from being shipped? > > Andreas Hansson wrote: > In my view the patch needs two things: > > 1) Some thought around the design. I am still hoping there is a less > invasive way of

[gem5-dev] Cron <m5test@zizzer> /z/m5/regression/do-regression quick

* build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing: CHANGED! *

Re: [gem5-dev] Vector register file

Hi Rekai, I too would love to see someone knowledgeable in other architectures, especially x86, take a look at these patches. Unfortunately, I'm not sure who we have around that either has the knowledge to do this, or has the time. I'll take a stab at it soon, though I don't know much about the

[gem5-dev] Vector register file

Hello again, I have gone through a round of review of the patches I submitted before Christmas, as in the rebasing I missed a couple things that made some regressions fail, and they were also some style mistakes. The patches concerned are: 3754, 3756, 3757, 3758 and 3760. I would really

[gem5-dev] Cron <m5test@zizzer> /z/m5/regression/do-regression --scratch all

* build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic: FAILED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt: CHANGED! *

Re: [gem5-dev] Review Request 3760: arch: ISA parser additions of vector registers

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3760/ --- (Updated Jan. 16, 2017, 12:04 p.m.) Review request for Default. Repository: gem5

Re: [gem5-dev] Review Request 3758: cpu: Added interface for vector reg file

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3758/ --- (Updated Jan. 16, 2017, 12:01 p.m.) Review request for Default. Repository: gem5

Re: [gem5-dev] Review Request 3758: cpu: Added interface for vector reg file

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3758/ --- (Updated Jan. 16, 2017, 11:56 a.m.) Review request for Default. Repository: gem5

Re: [gem5-dev] Review Request 3757: arch: added generic vector register

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3757/ --- (Updated Jan. 16, 2017, 11:54 a.m.) Review request for Default. Repository: gem5

Re: [gem5-dev] Review Request 3756: cpu: Result refactoring

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3756/ --- (Updated Jan. 16, 2017, 11:52 a.m.) Review request for Default. Repository: gem5

[gem5-dev] Review Request 3754: cpu: Simplify the rename interface and use RegId

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3754/ --- Review request for Default. Summary (updated) - cpu: Simplify the