[gem5-dev] Change in gem5/gem5[master]: mem: Rename the tag class init function to tagsInit.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13875 Change subject: mem: Rename the tag class init function to tagsInit. .. mem: Rename the tag class init function to

[gem5-dev] Change in gem5/gem5[master]: systemc: Change how SC_BIND_PROXY_NIL is initialized.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13879 Change subject: systemc: Change how SC_BIND_PROXY_NIL is initialized. .. systemc: Change how SC_BIND_PROXY_NIL is

[gem5-dev] Change in gem5/gem5[master]: systemc: Move a function after the class it uses internally.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13877 Change subject: systemc: Move a function after the class it uses internally. .. systemc: Move a function after the

[gem5-dev] Change in gem5/gem5[master]: systemc: Explicitly keep the sc_port bind alongside sc_in's version.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13880 Change subject: systemc: Explicitly keep the sc_port bind alongside sc_in's version. .. systemc: Explicitly keep

[gem5-dev] Change in gem5/gem5[master]: systemc: Get rid of implementations for some disabled sc_vector methods.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13878 Change subject: systemc: Get rid of implementations for some disabled sc_vector methods. .. systemc: Get rid of

[gem5-dev] Change in gem5/gem5[master]: systemc: Get rid of an unused private member in sc_clock.

Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13876 Change subject: systemc: Get rid of an unused private member in sc_clock. .. systemc: Get rid of an unused private

Re: [gem5-dev] Unreachable states in the MESI-Three-Level protocol

Hi Gabriel, It doesn't surprise me at all that there are unreachable states in the protocol. Specifically MESI_Three_Level was kind of quickly thrown together a few years ago to try to have an example three level protocol that looked something like Intel systems. The L0 cache was bolted on the

[gem5-dev] Change in gem5/gem5[master]: util: Add some examples for using systemc code within gem5.

Gabe Black has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/13376 ) Change subject: util: Add some examples for using systemc code within gem5. .. util: Add some examples for

[gem5-dev] Change in gem5/gem5[master]: util: Move the existing systemc example into a subdirectory.

Gabe Black has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/13375 ) Change subject: util: Move the existing systemc example into a subdirectory. .. util: Move the existing

[gem5-dev] Cron /z/m5/regression/do-regression quick

Statistics mismatch* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing: FAILED! *** diff[simout]: SKIPPED*** diff[config.json]: SKIPPED* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing: FAILED! *