Jordi Vaquero has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/19809 )
Change subject: arch-arm: adding register control flags enabling LSE
implementation
..
arch-arm: adding regi
Jordi Vaquero has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/19812 )
Change subject: arch-arm: Added LD/ST atomic instruction family and SWP
instrs
..
arch-arm: Added LD/ST atom
Jordi Vaquero has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/19810 )
Change subject: arch-arm: Add TypeAtomicOp class to be used by new atomic
instructions
..
arch-arm: Add Type
Jordi Vaquero has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/19811 )
Change subject: arch-arm: Adding CAS/CASP AMO instr including new
TypedAtomic func
..
arch-arm: Adding CAS/C
Hello Andreas Sandberg,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19813
to review the following change.
Change subject: dev-arm: Perform SMMUv3 CFG Invalidation at device interface
..
Jordi Vaquero has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/19815 )
Change subject: cpu-o3: fix atomic instructions non-speculative
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cpu-o3: fix atomic instructions non-speculat
Jordi Vaquero has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/19814 )
Change subject: cpu-o3: added _amo_op parameter in o3 LSQ
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cpu-o3: added _amo_op parameter in o3 LSQ
Fix bug
Hello Ciro Santilli,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19818
to review the following change.
Change subject: configs: Move create_cow_image helper method to devices.py
...
Hello Ciro Santilli,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19817
to review the following change.
Change subject: configs: Add "root=" kernel option to the starter_fs parser
..
Hello Ciro Santilli,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19816
to review the following change.
Change subject: configs: Split starter_fs.py in multiple functions
...
Hello Ciro Santilli,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19820
to review the following change.
Change subject: configs: Add an SMMUv3 based example config
..
Hello Ciro Santilli,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19819
to review the following change.
Change subject: configs: Add an SmmuSystem example
..
configs
Hello Matt Sinclair, Alexandru Duțu, John Alsop,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/12310
to look at the new patch set (#23).
Change subject: sim-se: adding pipe2 syscall
Hello Giacomo Travaglini,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19811
to look at the new patch set (#2).
Change subject: arch-arm: Adding CAS/CASP AMO instr including new
TypedAtomic func
...
Hello Giacomo Travaglini,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19812
to look at the new patch set (#2).
Change subject: arch-arm: Added LD/ST atomic instruction family and SWP
instrs
...
Hello Giacomo Travaglini,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19810
to look at the new patch set (#2).
Change subject: arch-arm: Add TypeAtomicOp class to be used by new atomic
instructions
...
Jordi Vaquero has uploaded a new patch set (#2). (
https://gem5-review.googlesource.com/c/public/gem5/+/19809 )
Change subject: arch-arm: adding register control flags enabling LSE
implementation
..
arch-arm: adding registe
Brandon Potter has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/12310 )
Change subject: sim-se: adding pipe2 syscall
..
sim-se: adding pipe2 syscall
pipe2 builds on top of the pipe syscall imp
*
build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full:
FAILED!
* build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3:
FAILED!
* build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual:
FAILED!
* build/NULL/tests/opt/quic
Brandon Potter has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/17111 )
Change subject: sim-se: add new getpgrp system call
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sim-se: add new getpgrp system call
This changeset adds new (rela
Hey Daniel, I realized that I wasn't applying the patch. Adding the virtual
destructor in replaceable_entry.hh fixed all the compilation issues.
Thanks for your help!
From: Daniel Carvalho
Sent: Saturday, August 3, 2019 2:43:21 PM
To: Kamran Hasan
Cc: Gem5 Dev
* build/NULL/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby: FAILED!
*
build/NULL_MOESI_hammer/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_hammer:
FAILED!
*
build/NULL_MESI_Two_Level/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MESI_Two_Level:
FAIL
Daniel Carvalho has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/19808 )
Change subject: mem-cache: Fix non-virtual base destructor of Repl Entry
..
mem-cache: Fix non-virtual base destructor o
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