[gem5-dev] Change in gem5/gem5[master]: sim: Add a takeOverFrom method to the base Port class.

2019-08-21 Thread Gabe Black (Gerrit)
Hello Andreas Sandberg, kokoro, Jason Lowe-Power, Nikos Nikoleris, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20233 to look at the new patch set (#3). Change subject: sim: Add a takeOverFrom method to the base Port class. .

[gem5-dev] Change in gem5/gem5[master]: mem: Split the various protocols out of the gem5 master/slave ports.

2019-08-21 Thread Gabe Black (Gerrit)
Hello Andreas Sandberg, Jason Lowe-Power, Nikos Nikoleris, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20228 to look at the new patch set (#3). Change subject: mem: Split the various protocols out of the gem5 master/slave ports.

[gem5-dev] Change in gem5/gem5[master]: mem: Move ruby protocols into a directory called ruby_protocol.

2019-08-21 Thread Gabe Black (Gerrit)
Hello Andreas Sandberg, Jason Lowe-Power, Nikos Nikoleris, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20230 to look at the new patch set (#3). Change subject: mem: Move ruby protocols into a directory called ruby_protocol. .

[gem5-dev] Change in gem5/gem5[master]: cpu: Make get(Data|Inst)Port return a Port and not a MasterPort.

2019-08-21 Thread Gabe Black (Gerrit)
Hello Andreas Sandberg, Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20240 to look at the new patch set (#3). Change subject: cpu: Make get(Data|Inst)Port return a Port and not a MasterPort. .

[gem5-dev] Change in gem5/gem5[master]: mem: Put gem5 protocols in their own directory.

2019-08-21 Thread Gabe Black (Gerrit)
Hello Andreas Sandberg, Brandon Potter, Jason Lowe-Power, Nikos Nikoleris, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20231 to look at the new patch set (#3). Change subject: mem: Put gem5 protocols in their own directory.

[gem5-dev] Change in gem5/gem5[master]: mem: Restrict the PortProxy class to the functional protocol.

2019-08-21 Thread Gabe Black (Gerrit)
Hello Andreas Sandberg, Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20229 to look at the new patch set (#3). Change subject: mem: Restrict the PortProxy class to the functional protocol.

[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntq/movntdq instructions

2019-08-21 Thread Pouya Fotouhi (Gerrit)
Hello Gabe Black, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20288 to look at the new patch set (#3). Change subject: arch-x86: implement movntq/movntdq instructions .

[gem5-dev] Change in gem5/gem5[master]: configs: root, platform options in fs bigLITTLE

2019-08-21 Thread Ciro Santilli (Gerrit)
Ciro Santilli has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/20148 ) Change subject: configs: root, platform options in fs bigLITTLE .. configs: root, platform options in fs bigLITTLE (1) Tw

[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntq/movntdq instructions

2019-08-21 Thread Pouya Fotouhi (Gerrit)
Hello Gabe Black, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20288 to look at the new patch set (#2). Change subject: arch-x86: implement movntq/movntdq instructions .

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Update register file

2019-08-21 Thread YIFEI LIU (Gerrit)
YIFEI LIU has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/20128 ) Change subject: arch-riscv: Update register file .. arch-riscv: Update register file This patch adds mcounteren, scounteren a

Re: [gem5-dev] [Bug report] Deprecated exception syntax in scons build files causing syntax errors

2019-08-21 Thread Jason Lowe-Power
Hey Ryan, Could you give more details on your system? What python version does it have? I thought we had dealt with the python3 issues in scons... Thanks, Jason On Tue, Aug 20, 2019 at 6:22 PM Gambord, Ryan wrote: > I recently updated my system and now I cannot build gem5 because scons > gives

[gem5-dev] Change in gem5/gem5[master]: mem-ruby: fix build with PROTOCOL=MOESI_hammer

2019-08-21 Thread Ciro Santilli (Gerrit)
Hello Andreas Sandberg, Giacomo Travaglini, Anthony Gutierrez, Jason Lowe-Power, Pouya Fotouhi, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20261 to look at the new patch set (#2). Change subject: mem-ruby: fix build with PROTOCOL

[gem5-dev] Change in gem5/gem5[master]: ruby: fix build with PROTOCOL=MOESI_hammer

2019-08-21 Thread Ciro Santilli (Gerrit)
Ciro Santilli has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/20261 ) Change subject: ruby: fix build with PROTOCOL=MOESI_hammer .. ruby: fix build with PROTOCOL=MOESI_hammer Was f

[gem5-dev] Change in gem5/gem5[master]: arch-arm, cpu: fix ARM ubsan build on GCC 7.4.0

2019-08-21 Thread Ciro Santilli (Gerrit)
Ciro Santilli has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/20048 ) Change subject: arch-arm, cpu: fix ARM ubsan build on GCC 7.4.0 .. arch-arm, cpu: fix ARM ubsan build on GCC 7.4.0 In src

[gem5-dev] Change in gem5/gem5[master]: base: assert that stats bucket size is greater than 0

2019-08-21 Thread Ciro Santilli (Gerrit)
Ciro Santilli has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/20049 ) Change subject: base: assert that stats bucket size is greater than 0 .. base: assert that stats bucket size is greater th

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Improper translation slot release in SMMUv3

2019-08-21 Thread Giacomo Travaglini (Gerrit)
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/20260 ) Change subject: dev-arm: Improper translation slot release in SMMUv3 .. dev-arm: Improper translation slot

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Implement invalidateASID in SMMUv3 WalkCache

2019-08-21 Thread Giacomo Travaglini (Gerrit)
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/20259 ) Change subject: dev-arm: Implement invalidateASID in SMMUv3 WalkCache .. dev-arm: Implement invalidateASID

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Implement invalidateVA/VAA in SMMUv3 WalkCache

2019-08-21 Thread Giacomo Travaglini (Gerrit)
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/20258 ) Change subject: dev-arm: Implement invalidateVA/VAA in SMMUv3 WalkCache .. dev-arm: Implement invalidateVA

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Allow 32 bit accesses to GITS_C(WRITER/READR/BASER)

2019-08-21 Thread Giacomo Travaglini (Gerrit)
Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20256 to review the following change. Change subject: dev-arm: Allow 32 bit accesses to GITS_C(WRITER/READR/BASER) ..

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Start using GITS_CTLR.quiescent bit

2019-08-21 Thread Giacomo Travaglini (Gerrit)
Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/20257 to review the following change. Change subject: dev-arm: Start using GITS_CTLR.quiescent bit ..

[gem5-dev] Change in gem5/gem5[master]: dev-arm, system-arm: missing GICv3 ranges property

2019-08-21 Thread Giacomo Travaglini (Gerrit)
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/20255 ) Change subject: dev-arm,system-arm: missing GICv3 ranges property .. dev-arm,system-arm: missing GICv3 ran

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Fix implicit fallthrough build errors

2019-08-21 Thread Chun-Chen TK Hsu (Gerrit)
Chun-Chen TK Hsu has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/20268 ) Change subject: arch-arm: Fix implicit fallthrough build errors .. arch-arm: Fix implicit fallthrough build errors 194

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Fix load the trap vector(tvec) to PC

2019-08-21 Thread YIFEI LIU (Gerrit)
YIFEI LIU has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/20308 ) Change subject: arch-riscv: Fix load the trap vector(tvec) to PC .. arch-riscv: Fix load the trap vector(tvec) to P

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Create system file for RISCV FS

2019-08-21 Thread YIFEI LIU (Gerrit)
Hello kokoro, Alec Roelke, Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/19828 to look at the new patch set (#11). Change subject: arch-riscv: Create system file for RISCV FS .

[gem5-dev] Cron /z/m5/regression/do-regression quick

2019-08-21 Thread Cron Daemon
See /z/m5/regression/regress-2019-08-21-03:00:01 for details. ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev