[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add support to exit the simloop on PMU interrupt

Richard Cooper has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/69958?usp=email ) Change subject: arch-arm: Add support to exit the simloop on PMU interrupt .. arch-arm: Add support to exit the

[gem5-dev] [M] Change in gem5/gem5[develop]: configs: Add --pmu-{dump,reset}-stats-on to Arm baremetal.py.

Richard Cooper has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/69959?usp=email ) Change subject: configs: Add --pmu-{dump,reset}-stats-on to Arm baremetal.py. .. configs: Add --pmu-{dump,re

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Add support to exit the simloop on PMU control

Richard Cooper has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70417?usp=email ) Change subject: arch-arm: Add support to exit the simloop on PMU control .. arch-arm: Add support to exit the s

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Replace 0ing of miscRegs with assignment of reset value

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70457?usp=email to review the following change. Change subject: arch-arm: Replace 0ing of miscRegs with assignme

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Make MISCREGs reset value configurable

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70458?usp=email to review the following change. Change subject: arch-arm: Make MISCREGs reset value configurable

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Rewrite ISA::initID32 using BitUnions

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70466?usp=email to review the following change. Change subject: arch-arm: Rewrite ISA::initID32 using BitUnions

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Generalize SCTLR_RST behaviour

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70459?usp=email to review the following change. Change subject: arch-arm: Generalize SCTLR_RST behaviour ...

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map CTR_EL0 to AArch32 version

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70463?usp=email to review the following change. Change subject: arch-arm: Map CTR_EL0 to AArch32 version ...

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MVFR0_EL1/MVFR1_EL1 to AArch32 version

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70460?usp=email to review the following change. Change subject: arch-arm: Map MVFR0_EL1/MVFR1_EL1 to AArch32 ver

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MPIDR_EL1 to AArch32 version

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70462?usp=email to review the following change. Change subject: arch-arm: Map MPIDR_EL1 to AArch32 version .

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Move MISCREG init logic from ISA to reset field

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70465?usp=email to review the following change. Change subject: arch-arm: Move MISCREG init logic from ISA to re

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Fix read redirection for MIDR register

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70464?usp=email to review the following change. Change subject: arch-arm: Fix read redirection for MIDR register

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: Map MIDR_EL1 to AArch32 version

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70461?usp=email to review the following change. Change subject: arch-arm: Map MIDR_EL1 to AArch32 version ..

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove ISA::initID32

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70467?usp=email to review the following change. Change subject: arch-arm: Remove ISA::initID32 .

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove ISA::initID64

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70469?usp=email to review the following change. Change subject: arch-arm: Remove ISA::initID64 .

[gem5-dev] [XS] Change in gem5/gem5[develop]: arch-arm: VMPIDR_EL2 can be used in secure mode as well

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70471?usp=email to review the following change. Change subject: arch-arm: VMPIDR_EL2 can be used in secure mode

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Rewrite ISA::initID64 using BitUnions

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70468?usp=email to review the following change. Change subject: arch-arm: Rewrite ISA::initID64 using BitUnions

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Remove clear32/64 methods

Attention is currently required from: Richard Cooper. Hello Richard Cooper, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/70470?usp=email to review the following change. Change subject: arch-arm: Remove clear32/64 methods

[gem5-dev] Re: Problem on simulating GCN3 GPU: Running DNNMark too slow.

I have not personally tried to run FWD_FC lately -- we do test some of the DNNMark layers in the weekly test, but testing all of them is not practical. Looking at the error though, it appears that the simulated gem5 memory system is not big enough. I would try increasing --mem-size on the command

[gem5-dev] [XS] Change in gem5/gem5[develop]: tests: Add '--duplicate-sources' to libgem5 SST build

Bobby Bruce has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/70497?usp=email ) Change subject: tests: Add '--duplicate-sources' to libgem5 SST build .. tests: Add '--duplicate-source