See 
<https://jenkins.gem5.org/job/nightly%201-thread/3/display/redirect?page=changes>

Changes:

[giacomo.travaglini] arch-arm: Replace mcrMrc15TrapToHyp with mcrMrc15Trap

[giacomo.travaglini] arch-arm: Reuse MCR15 trapping code in DC instructions

[kyleroarty1716] arch-vega: Handle signed offsets in Global/Scratch instructions

[gabe.black] cpu-o3: Manage per-register-type free lists with an array.

[gabe.black] cpu-o3: Initialize register maps and free lists with loops.

[gabe.black] arch: Introduce an intermediate RegOperand class in 
operand_types.py.

[gabe.black] arch: Get rid of the is${Type}Reg methods of the Operand class.

[giacomo.travaglini] sim: Avoid -Werror=unused-variable in bufval unittests

[giacomo.travaglini] arch-arm: Implement DSB Shareable with a separate class

[giacomo.travaglini] arch-arm: Implement TLBI instructions with a separate class

[giacomo.travaglini] mem: Add TLB invalidation flags to the Request object

[giacomo.travaglini] cpu: Fix SimpleExecContext coding style


------------------------------------------
[...truncated 77.59 KB...]
 [ TRACING]  -> NULL/debug/Registers.cc
 [     CXX] NULL/debug/MiscRegs.cc -> .o
 [ TRACING]  -> NULL/debug/Registers.hh
 [     CXX] NULL/debug/Registers.cc -> .o
 [ TRACING]  -> NULL/debug/Decoder.cc
 [ TRACING]  -> NULL/debug/Decoder.hh
 [     CXX] NULL/debug/Decoder.cc -> .o
 [ TRACING]  -> NULL/debug/Faults.cc
 [ TRACING]  -> NULL/debug/TLBVerbose.cc
 [ TRACING]  -> NULL/debug/Faults.hh
 [ TRACING]  -> NULL/debug/TLBVerbose.hh
 [     CXX] NULL/debug/Faults.cc -> .o
 [     CXX] NULL/debug/TLBVerbose.cc -> .o
 [     CXX] NULL/arch/generic/htm.cc -> .o
 [SO Param] m5.objects.BaseMMU, BaseMMU -> NULL/params/BaseMMU.hh
 [ENUMDECL] m5.objects.BaseTLB, TypeTLB -> NULL/enums/TypeTLB.hh
 [SO Param] m5.objects.BaseTLB, BaseTLB -> NULL/params/BaseTLB.hh
 [     CXX] NULL/arch/generic/BaseInterrupts.py.cc -> .o
 [SO Param] m5.objects.BaseInterrupts, BaseInterrupts -> 
NULL/python/_m5/param_BaseInterrupts.cc
 [     CXX] NULL/arch/generic/BaseISA.py.cc -> .o
 [     CXX] NULL/arch/generic/mmu.cc -> .o
 [SO Param] m5.objects.BaseInterrupts, BaseInterrupts -> 
NULL/params/BaseInterrupts.hh
 [     CXX] NULL/python/_m5/param_BaseInterrupts.cc -> .o
 [SO Param] m5.objects.BaseISA, BaseISA -> NULL/python/_m5/param_BaseISA.cc
 [     CXX] NULL/arch/generic/BaseMMU.py.cc -> .o
 [SO Param] m5.objects.BaseISA, BaseISA -> NULL/params/BaseISA.hh
 [     CXX] NULL/python/_m5/param_BaseISA.cc -> .o
 [SO Param] m5.objects.BaseMMU, BaseMMU -> NULL/python/_m5/param_BaseMMU.cc
 [     CXX] NULL/arch/generic/BaseTLB.py.cc -> .o
 [     CXX] NULL/python/_m5/param_BaseMMU.cc -> .o
 [SO Param] m5.objects.BaseTLB, BaseTLB -> NULL/python/_m5/param_BaseTLB.cc
 [     CXX] NULL/python/_m5/param_BaseTLB.cc -> .o
 [ENUM STR] m5.objects.BaseTLB, TypeTLB -> NULL/enums/TypeTLB.cc
 [     CXX] NULL/enums/TypeTLB.cc -> .o
 [     CXX] NULL/arch/generic/InstDecoder.py.cc -> .o
 [SO Param] m5.objects.InstDecoder, InstDecoder -> 
NULL/python/_m5/param_InstDecoder.cc
 [SO Param] m5.objects.InstDecoder, InstDecoder -> NULL/params/InstDecoder.hh
 [ TRACING]  -> NULL/debug/PageTableWalker.cc
 [ TRACING]  -> NULL/debug/PageTableWalker.hh
 [     CXX] NULL/debug/PageTableWalker.cc -> .o
 [     CXX] NULL/python/_m5/param_InstDecoder.cc -> .o
 [ TRACING]  -> NULL/debug/TLB.cc
 [ TRACING]  -> NULL/debug/TLB.hh
 [     CXX] NULL/debug/TLB.cc -> .o
 [     CXX] NULL/arch/generic/decoder.cc -> .o
 [     CXX] NULL/sst/OutgoingRequestBridge.py.cc -> .o
 [SO Param] m5.objects.OutgoingRequestBridge, OutgoingRequestBridge -> 
NULL/python/_m5/param_OutgoingRequestBridge.cc
 [SO Param] m5.objects.OutgoingRequestBridge, OutgoingRequestBridge -> 
NULL/params/OutgoingRequestBridge.hh
 [     CXX] NULL/sst/sst_responder_interface.cc -> .o
 [ TRACING]  -> NULL/debug/Activity.cc
 [ TRACING]  -> NULL/debug/Activity.hh
 [     CXX] NULL/sst/outgoing_request_bridge.cc -> .o
 [     CXX] NULL/debug/Activity.cc -> .o
 [     CXX] NULL/python/_m5/param_OutgoingRequestBridge.cc -> .o
 [ TRACING]  -> NULL/debug/Commit.cc
 [ TRACING]  -> NULL/debug/Commit.hh
 [     CXX] NULL/debug/Commit.cc -> .o
 [ TRACING]  -> NULL/debug/Context.cc
 [ TRACING]  -> NULL/debug/Context.hh
 [ TRACING]  -> NULL/debug/Decode.cc
 [     CXX] NULL/debug/Context.cc -> .o
 [ TRACING]  -> NULL/debug/DynInst.cc
 [ TRACING]  -> NULL/debug/Decode.hh
 [ TRACING]  -> NULL/debug/DynInst.hh
 [ TRACING]  -> NULL/debug/ExecEnable.cc
 [     CXX] NULL/debug/Decode.cc -> .o
 [ TRACING]  -> NULL/debug/ExecCPSeq.cc
 [     CXX] NULL/debug/DynInst.cc -> .o
 [ TRACING]  -> NULL/debug/ExecEnable.hh
 [ TRACING]  -> NULL/debug/ExecCPSeq.hh
 [     CXX] NULL/debug/ExecEnable.cc -> .o
 [     CXX] NULL/debug/ExecCPSeq.cc -> .o
 [ TRACING]  -> NULL/debug/ExecEffAddr.cc
 [ TRACING]  -> NULL/debug/ExecEffAddr.hh
 [     CXX] NULL/debug/ExecEffAddr.cc -> .o
 [ TRACING]  -> NULL/debug/ExecFaulting.cc
 [ TRACING]  -> NULL/debug/ExecFetchSeq.cc
 [ TRACING]  -> NULL/debug/ExecFaulting.hh
 [ TRACING]  -> NULL/debug/ExecOpClass.cc
 [ TRACING]  -> NULL/debug/ExecFetchSeq.hh
 [     CXX] NULL/debug/ExecFaulting.cc -> .o
 [ TRACING]  -> NULL/debug/ExecOpClass.hh
 [     CXX] NULL/debug/ExecFetchSeq.cc -> .o
 [ TRACING]  -> NULL/debug/ExecRegDelta.cc
 [ TRACING]  -> NULL/debug/ExecResult.cc
 [ TRACING]  -> NULL/debug/ExecSymbol.cc
 [     CXX] NULL/debug/ExecOpClass.cc -> .o
 [ TRACING]  -> NULL/debug/ExecRegDelta.hh
 [ TRACING]  -> NULL/debug/ExecThread.cc
 [ TRACING]  -> NULL/debug/ExecResult.hh
 [ TRACING]  -> NULL/debug/ExecSymbol.hh
 [ TRACING]  -> NULL/debug/ExecMicro.cc
 [     CXX] NULL/debug/ExecRegDelta.cc -> .o
 [ TRACING]  -> NULL/debug/ExecMacro.cc
 [     CXX] NULL/debug/ExecResult.cc -> .o
 [ TRACING]  -> NULL/debug/ExecThread.hh
 [ TRACING]  -> NULL/debug/ExecMicro.hh
 [     CXX] NULL/debug/ExecSymbol.cc -> .o
 [     CXX] NULL/debug/ExecMicro.cc -> .o
 [     CXX] NULL/debug/ExecThread.cc -> .o
 [ TRACING]  -> NULL/debug/ExecMacro.hh
 [ TRACING]  -> NULL/debug/ExecUser.cc
 [ TRACING]  -> NULL/debug/ExecKernel.cc
 [ TRACING]  -> NULL/debug/ExecAsid.cc
 [ TRACING]  -> NULL/debug/ExecFlags.cc
 [ TRACING]  -> NULL/debug/Fetch.cc
 [ TRACING]  -> NULL/debug/ExecUser.hh
 [     CXX] NULL/debug/ExecMacro.cc -> .o
 [ TRACING]  -> NULL/debug/ExecKernel.hh
 [ TRACING]  -> NULL/debug/ExecFlags.hh
 [ TRACING]  -> NULL/debug/ExecAsid.hh
 [ TRACING]  -> NULL/debug/HtmCpu.cc
 [ TRACING]  -> NULL/debug/Fetch.hh
 [     CXX] NULL/debug/ExecKernel.cc -> .o
 [     CXX] NULL/debug/ExecUser.cc -> .o
 [ TRACING]  -> NULL/debug/HtmCpu.hh
 [     CXX] NULL/debug/ExecFlags.cc -> .o
 [ TRACING]  -> NULL/debug/O3PipeView.cc
 [     CXX] NULL/debug/ExecAsid.cc -> .o
 [     CXX] NULL/debug/Fetch.cc -> .o
 [ TRACING]  -> NULL/debug/PCEvent.cc
 [ TRACING]  -> NULL/debug/O3PipeView.hh
 [     CXX] NULL/debug/HtmCpu.cc -> .o
 [ TRACING]  -> NULL/debug/Quiesce.cc
 [ TRACING]  -> NULL/debug/PCEvent.hh
 [ TRACING]  -> NULL/debug/Mwait.cc
 [     CXX] NULL/debug/O3PipeView.cc -> .o
 [ TRACING]  -> NULL/debug/ExecAll.cc
 [ TRACING]  -> NULL/debug/Quiesce.hh
 [ TRACING]  -> NULL/debug/Exec.cc
 [ TRACING]  -> NULL/debug/Mwait.hh
 [     CXX] NULL/debug/PCEvent.cc -> .o
 [ TRACING]  -> NULL/debug/ExecAll.hh
 [     CXX] NULL/debug/Quiesce.cc -> .o
 [ TRACING]  -> NULL/debug/ExecNoTicks.cc
 [SO Param] m5.objects.FuncUnit, FUDesc -> NULL/params/FUDesc.hh
 [     CXX] NULL/debug/Mwait.cc -> .o
 [ TRACING]  -> NULL/debug/Exec.hh
 [     CXX] NULL/debug/ExecAll.cc -> .o
 [ TRACING]  -> NULL/debug/ExecNoTicks.hh
 [SO Param] m5.objects.FuncUnit, OpDesc -> NULL/params/OpDesc.hh
 [     CXX] NULL/debug/Exec.cc -> .o
 [ENUMDECL] m5.objects.FuncUnit, OpClass -> NULL/enums/OpClass.hh
 [     CXX] NULL/debug/ExecNoTicks.cc -> .o
 [     CXX] NULL/cpu/pc_event.cc -> .o
 [     CXX] NULL/cpu/FuncUnit.py.cc -> .o
 [SO Param] m5.objects.FuncUnit, OpDesc -> NULL/python/_m5/param_OpDesc.cc
 [SO Param] m5.objects.FuncUnit, FUDesc -> NULL/python/_m5/param_FUDesc.cc
 [ENUM STR] m5.objects.FuncUnit, OpClass -> NULL/enums/OpClass.cc
 [     CXX] NULL/cpu/StaticInstFlags.py.cc -> .o
 [ENUM STR] m5.objects.StaticInstFlags, StaticInstFlags -> 
NULL/enums/StaticInstFlags.cc
 [     CXX] NULL/cpu/func_unit.cc -> .o
 [     CXX] NULL/cpu/testers/directedtest/RubyDirectedTester.py.cc -> .o
 [SO Param] m5.objects.RubyDirectedTester, DirectedGenerator -> 
NULL/python/_m5/param_DirectedGenerator.cc
 [     CXX] NULL/python/_m5/param_OpDesc.cc -> .o
 [     CXX] NULL/python/_m5/param_FUDesc.cc -> .o
 [     CXX] NULL/enums/OpClass.cc -> .o
 [SO Param] m5.objects.RubyDirectedTester, SeriesRequestGenerator -> 
NULL/python/_m5/param_SeriesRequestGenerator.cc
 [ENUMDECL] m5.objects.StaticInstFlags, StaticInstFlags -> 
NULL/enums/StaticInstFlags.hh
 [SO Param] m5.objects.RubyDirectedTester, InvalidateGenerator -> 
NULL/python/_m5/param_InvalidateGenerator.cc
 [SO Param] m5.objects.RubyDirectedTester, RubyDirectedTester -> 
NULL/python/_m5/param_RubyDirectedTester.cc
 [SO Param] m5.objects.RubyDirectedTester, DirectedGenerator -> 
NULL/params/DirectedGenerator.hh
 [SO Param] m5.objects.RubyDirectedTester, RubyDirectedTester -> 
NULL/params/RubyDirectedTester.hh
 [SO Param] m5.objects.RubyDirectedTester, SeriesRequestGenerator -> 
NULL/params/SeriesRequestGenerator.hh
 [     CXX] NULL/enums/StaticInstFlags.cc -> .o
 [SO Param] m5.objects.RubyDirectedTester, InvalidateGenerator -> 
NULL/params/InvalidateGenerator.hh
 [SO Param] m5.objects.ClockDomain, DerivedClockDomain -> 
NULL/params/DerivedClockDomain.hh
 [SO Param] m5.objects.ClockDomain, SrcClockDomain -> 
NULL/params/SrcClockDomain.hh
 [ TRACING]  -> NULL/debug/DirectedTest.hh
 [ TRACING]  -> NULL/debug/DirectedTest.cc
 [     CXX] NULL/cpu/testers/memtest/MemTest.py.cc -> .o
 [SO Param] m5.objects.MemTest, MemTest -> NULL/python/_m5/param_MemTest.cc
 [ TRACING]  -> NULL/debug/MemTest.hh
 [SO Param] m5.objects.MemTest, MemTest -> NULL/params/MemTest.hh
 [     CXX] NULL/debug/DirectedTest.cc -> .o
 [ TRACING]  -> NULL/debug/MemTest.cc
 [     CXX] NULL/cpu/testers/rubytest/RubyTester.py.cc -> .o
 [SO Param] m5.objects.RubyTester, RubyTester -> 
NULL/python/_m5/param_RubyTester.cc
 [ TRACING]  -> NULL/debug/RubyTest.hh
 [SO Param] m5.objects.VoltageDomain, VoltageDomain -> 
NULL/params/VoltageDomain.hh
 [     CXX] NULL/debug/MemTest.cc -> .o
 [SO Param] m5.objects.RubyTester, RubyTester -> NULL/params/RubyTester.hh
 [ TRACING]  -> NULL/debug/RubyTest.cc
 [CONFIG H] HAVE_PROTOBUF, 1 -> NULL/config/have_protobuf.hh
 [ TRACING]  -> NULL/debug/Checkpoint.hh
 [     CXX] NULL/debug/RubyTest.cc -> .o
 [ TRACING]  -> NULL/debug/TrafficGen.hh
 [ENUMDECL] m5.objects.MemInterface, AddrMap -> NULL/enums/AddrMap.hh
 [     CXX] NULL/cpu/testers/directedtest/SeriesRequestGenerator.cc -> .o
 [     CXX] NULL/cpu/testers/rubytest/Check.cc -> .o
 [     CXX] NULL/python/_m5/param_RubyTester.cc -> .o
 [     CXX] NULL/cpu/testers/rubytest/CheckTable.cc -> .o
 [     CXX] NULL/cpu/testers/rubytest/RubyTester.cc -> .o
 [     CXX] NULL/python/_m5/param_SeriesRequestGenerator.cc -> .o
 [     CXX] NULL/python/_m5/param_RubyDirectedTester.cc -> .o
 [     CXX] NULL/cpu/testers/directedtest/InvalidateGenerator.cc -> .o
 [     CXX] NULL/cpu/testers/memtest/memtest.cc -> .o
 [     CXX] NULL/cpu/testers/directedtest/DirectedGenerator.cc -> .o
 [     CXX] NULL/python/_m5/param_DirectedGenerator.cc -> .o
 [     CXX] NULL/python/_m5/param_InvalidateGenerator.cc -> .o
 [     CXX] NULL/python/_m5/param_MemTest.cc -> .o
 [     CXX] NULL/cpu/testers/directedtest/RubyDirectedTester.cc -> .o
 [SO Param] m5.objects.BaseTrafficGen, BaseTrafficGen -> 
NULL/params/BaseTrafficGen.hh
 [ENUMDECL] m5.objects.BaseTrafficGen, StreamGenType -> 
NULL/enums/StreamGenType.hh
 [     CXX] NULL/cpu/testers/traffic_gen/base_gen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/base.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/dram_gen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/dram_rot_gen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/exit_gen.cc -> .o
 [ TRACING]  -> NULL/debug/GUPSGen.hh
 [SO Param] m5.objects.GUPSGen, GUPSGen -> NULL/params/GUPSGen.hh
 [     CXX] NULL/cpu/testers/traffic_gen/gups_gen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/hybrid_gen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/idle_gen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/linear_gen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/nvm_gen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/random_gen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/stream_gen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/strided_gen.cc -> .o
 [ TRACING]  -> NULL/debug/TrafficGen.cc
 [     CXX] NULL/debug/TrafficGen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/BaseTrafficGen.py.cc -> .o
 [SO Param] m5.objects.BaseTrafficGen, BaseTrafficGen -> 
NULL/python/_m5/param_BaseTrafficGen.cc
 [ENUM STR] m5.objects.BaseTrafficGen, StreamGenType -> 
NULL/enums/StreamGenType.cc
 [ TRACING]  -> NULL/debug/GUPSGen.cc
 [     CXX] NULL/cpu/testers/traffic_gen/GUPSGen.py.cc -> .o
 [     CXX] NULL/debug/GUPSGen.cc -> .o
 [     CXX] NULL/python/_m5/param_BaseTrafficGen.cc -> .o
 [     CXX] NULL/enums/StreamGenType.cc -> .o
 [SO Param] m5.objects.GUPSGen, GUPSGen -> NULL/python/_m5/param_GUPSGen.cc
 [SO Param] m5.objects.PyTrafficGen, PyTrafficGen -> NULL/params/PyTrafficGen.hh
 [     CXX] NULL/python/_m5/param_GUPSGen.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/PyTrafficGen.py.cc -> .o
 [     CXX] NULL/cpu/testers/traffic_gen/pygen.cc -> .o
 [SO Param] m5.objects.PyTrafficGen, PyTrafficGen -> 
NULL/python/_m5/param_PyTrafficGen.cc
 [     CXX] NULL/cpu/testers/traffic_gen/TrafficGen.py.cc -> .o
 [     CXX] NULL/python/_m5/param_PyTrafficGen.cc -> .o
 [SO Param] m5.objects.TrafficGen, TrafficGen -> 
NULL/python/_m5/param_TrafficGen.cc
 [  PROTOC] NULL/proto/packet.proto -> NULL/proto/packet.pb.cc, 
NULL/proto/packet.pb.h
/nobackup/jenkins/workspace/nightly: warning: directory does not exist.
1-thread/build/NULL: No such file or directory
scons: *** [build/NULL/proto/packet.pb.cc] Error 1
scons: building terminated because of errors.
*** Summary of Warnings ***
Warning: Deprecated namespaces are not supported by this compiler.
         Please make sure to check the mailing list for deprecation
         announcements.
Build step 'Execute shell' marked build as failure
Archiving artifacts
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