Hoa Nguyen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/41014 )

Change subject: mem: Change units of mem_interface to supported units
......................................................................

mem: Change units of mem_interface to supported units

Change-Id: I4be712dcc9c37b2d3688f23b074634c981a2e64b
Signed-off-by: Hoa Nguyen <hoangu...@ucdavis.edu>
---
M src/mem/mem_interface.cc
1 file changed, 103 insertions(+), 129 deletions(-)



diff --git a/src/mem/mem_interface.cc b/src/mem/mem_interface.cc
index 95b571e..52d601e 100644
--- a/src/mem/mem_interface.cc
+++ b/src/mem/mem_interface.cc
@@ -1786,28 +1786,34 @@

     // The energy components inside the power lib are calculated over
     // the window so accumulate into the corresponding gem5 stat
-    stats.actEnergy += energy.act_energy * dram.devicesPerRank;
-    stats.preEnergy += energy.pre_energy * dram.devicesPerRank;
-    stats.readEnergy += energy.read_energy * dram.devicesPerRank;
-    stats.writeEnergy += energy.write_energy * dram.devicesPerRank;
-    stats.refreshEnergy += energy.ref_energy * dram.devicesPerRank;
-    stats.actBackEnergy += energy.act_stdby_energy * dram.devicesPerRank;
-    stats.preBackEnergy += energy.pre_stdby_energy * dram.devicesPerRank;
- stats.actPowerDownEnergy += energy.f_act_pd_energy * dram.devicesPerRank; - stats.prePowerDownEnergy += energy.f_pre_pd_energy * dram.devicesPerRank;
-    stats.selfRefreshEnergy += energy.sref_energy * dram.devicesPerRank;
+    stats.actEnergy += energy.act_energy * dram.devicesPerRank * 1e-12;
+    stats.preEnergy += energy.pre_energy * dram.devicesPerRank * 1e-12;
+    stats.readEnergy += energy.read_energy * dram.devicesPerRank * 1e-12;
+    stats.writeEnergy += energy.write_energy * dram.devicesPerRank * 1e-12;
+    stats.refreshEnergy += energy.ref_energy * dram.devicesPerRank * 1e-12;
+    stats.actBackEnergy += energy.act_stdby_energy * dram.devicesPerRank
+        * 1e-12;
+    stats.preBackEnergy += energy.pre_stdby_energy * dram.devicesPerRank
+        * 1e-12;
+ stats.actPowerDownEnergy += energy.f_act_pd_energy * dram.devicesPerRank
+        * 1e-12;
+ stats.prePowerDownEnergy += energy.f_pre_pd_energy * dram.devicesPerRank
+        * 1e-12;
+    stats.selfRefreshEnergy += energy.sref_energy * dram.devicesPerRank
+        * 1e-12;

     // Accumulate window energy into the total energy.
-    stats.totalEnergy += energy.window_energy * dram.devicesPerRank;
+ stats.totalEnergy += energy.window_energy * dram.devicesPerRank * 1e-12;
+
     // Average power must not be accumulated but calculated over the time
-    // since last stats reset. SimClock::Frequency is tick period not tick
-    // frequency.
-    //              energy (pJ)     1e-9
-    // power (mW) = ----------- * ----------
-    //              time (tick)   tick_frequency
+ // since last stats reset. SimClock::Frequency is an integer representing + // the number of ticks per second, which is the same as SimClock::Int::s.
+    //             energy (J)
+    // power (W) = ----------- x ticks_per_second
+    //             time (tick)
     stats.averagePower = (stats.totalEnergy.value() /
                     (curTick() - dram.lastStatsResetTick)) *
-                    (SimClock::Frequency / 1000000000.0);
+                    (SimClock::Int::s);
 }

 void
@@ -1849,50 +1855,39 @@
     : Stats::Group(&_dram),
     dram(_dram),

-    ADD_STAT(readBursts, UNIT_COUNT, "Number of DRAM read bursts"),
-    ADD_STAT(writeBursts, UNIT_COUNT, "Number of DRAM write bursts"),
+    ADD_STAT(readBursts, "Number of DRAM read bursts"),
+    ADD_STAT(writeBursts, "Number of DRAM write bursts"),

-    ADD_STAT(perBankRdBursts, UNIT_COUNT, "Per bank write bursts"),
-    ADD_STAT(perBankWrBursts, UNIT_COUNT, "Per bank write bursts"),
+    ADD_STAT(perBankRdBursts, "Per bank write bursts"),
+    ADD_STAT(perBankWrBursts, "Per bank write bursts"),

-    ADD_STAT(totQLat, UNIT_TICK, "Total ticks spent queuing"),
- ADD_STAT(totBusLat, UNIT_TICK, "Total ticks spent in databus transfers"),
-    ADD_STAT(totMemAccLat, UNIT_TICK,
+    ADD_STAT(totQLat, "Total ticks spent queuing"),
+    ADD_STAT(totBusLat, "Total ticks spent in databus transfers"),
+    ADD_STAT(totMemAccLat,
              "Total ticks spent from burst creation until serviced "
              "by the DRAM"),

-    ADD_STAT(avgQLat, UNIT_RATE(Stats::Units::Tick, Stats::Units::Count),
-             "Average queueing delay per DRAM burst"),
-    ADD_STAT(avgBusLat, UNIT_RATE(Stats::Units::Tick, Stats::Units::Count),
-             "Average bus latency per DRAM burst"),
- ADD_STAT(avgMemAccLat, UNIT_RATE(Stats::Units::Tick, Stats::Units::Count),
-             "Average memory access latency per DRAM burst"),
+    ADD_STAT(avgQLat, "Average queueing delay per DRAM burst"),
+    ADD_STAT(avgBusLat, "Average bus latency per DRAM burst"),
+    ADD_STAT(avgMemAccLat, "Average memory access latency per DRAM burst"),

-    ADD_STAT(readRowHits, UNIT_COUNT,
-             "Number of row buffer hits during reads"),
-    ADD_STAT(writeRowHits, UNIT_COUNT,
-             "Number of row buffer hits during writes"),
-    ADD_STAT(readRowHitRate, UNIT_RATIO, "Row buffer hit rate for reads"),
- ADD_STAT(writeRowHitRate, UNIT_RATIO, "Row buffer hit rate for writes"),
+    ADD_STAT(readRowHits, "Number of row buffer hits during reads"),
+    ADD_STAT(writeRowHits, "Number of row buffer hits during writes"),
+    ADD_STAT(readRowHitRate, "Row buffer hit rate for reads"),
+    ADD_STAT(writeRowHitRate, "Row buffer hit rate for writes"),

- ADD_STAT(bytesPerActivate, UNIT_BYTE, "Bytes accessed per row activation"),
-    ADD_STAT(bytesRead, UNIT_BYTE, "Total number of bytes read from DRAM"),
- ADD_STAT(bytesWritten, UNIT_BYTE, "Total number of bytes written to DRAM"),
-    ADD_STAT(avgRdBW, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-             "Average DRAM read bandwidth in MiBytes/s"),
-    ADD_STAT(avgWrBW, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-             "Average DRAM write bandwidth in MiBytes/s"),
-    ADD_STAT(peakBW,  UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-             "Theoretical peak bandwidth in MiByte/s"),
+    ADD_STAT(bytesPerActivate, "Bytes accessed per row activation"),
+    ADD_STAT(bytesRead, "Total number of bytes read from DRAM"),
+    ADD_STAT(bytesWritten, "Total number of bytes written to DRAM"),
+    ADD_STAT(avgRdBW, "Average DRAM read bandwidth in Bytes/s"),
+    ADD_STAT(avgWrBW, "Average DRAM write bandwidth in Bytes/s"),
+    ADD_STAT(peakBW, "Theoretical peak bandwidth in Byte/s"),

-    ADD_STAT(busUtil, UNIT_RATIO, "Data bus utilization in percentage"),
-    ADD_STAT(busUtilRead, UNIT_RATIO,
-             "Data bus utilization in percentage for reads"),
-    ADD_STAT(busUtilWrite, UNIT_RATIO,
-             "Data bus utilization in percentage for writes"),
+    ADD_STAT(busUtil, "Data bus utilization"),
+    ADD_STAT(busUtilRead, "Data bus utilization for reads"),
+    ADD_STAT(busUtilWrite, "Data bus utilization for writes"),

-    ADD_STAT(pageHitRate, UNIT_RATIO,
-             "Row buffer hit rate, read and write combined")
+    ADD_STAT(pageHitRate, "Row buffer hit rate, read and write combined")

 {
 }
@@ -1917,7 +1912,7 @@
               dram.maxAccessesPerRow : dram.rowBufferSize)
         .flags(nozero);

-    peakBW.precision(2);
+    peakBW.precision(8);
     busUtil.precision(2);
     busUtilWrite.precision(2);
     busUtilRead.precision(2);
@@ -1929,52 +1924,40 @@
     avgBusLat = totBusLat / readBursts;
     avgMemAccLat = totMemAccLat / readBursts;

-    readRowHitRate = (readRowHits / readBursts) * 100;
-    writeRowHitRate = (writeRowHits / writeBursts) * 100;
+    readRowHitRate = (readRowHits / readBursts);
+    writeRowHitRate = (writeRowHits / writeBursts);

-    avgRdBW = (bytesRead / 1000000) / simSeconds;
-    avgWrBW = (bytesWritten / 1000000) / simSeconds;
-    peakBW = (SimClock::Frequency / dram.burstDelay()) *
-              dram.bytesPerBurst() / 1000000;
+    avgRdBW = bytesRead / simSeconds;
+    avgWrBW = bytesWritten / simSeconds;
+ peakBW = (SimClock::Frequency / dram.burstDelay()) * dram.bytesPerBurst();

-    busUtil = (avgRdBW + avgWrBW) / peakBW * 100;
-    busUtilRead = avgRdBW / peakBW * 100;
-    busUtilWrite = avgWrBW / peakBW * 100;
+    busUtil = (avgRdBW + avgWrBW) / peakBW;
+    busUtilRead = avgRdBW / peakBW;
+    busUtilWrite = avgWrBW / peakBW;

-    pageHitRate = (writeRowHits + readRowHits) /
-        (writeBursts + readBursts) * 100;
+ pageHitRate = (writeRowHits + readRowHits) / (writeBursts + readBursts);
 }

 DRAMInterface::RankStats::RankStats(DRAMInterface &_dram, Rank &_rank)
     : Stats::Group(&_dram, csprintf("rank%d", _rank.rank).c_str()),
     rank(_rank),

-    ADD_STAT(actEnergy, UNIT_JOULE,
-             "Energy for activate commands per rank (pJ)"),
-    ADD_STAT(preEnergy, UNIT_JOULE,
-             "Energy for precharge commands per rank (pJ)"),
-    ADD_STAT(readEnergy, UNIT_JOULE,
-             "Energy for read commands per rank (pJ)"),
-    ADD_STAT(writeEnergy, UNIT_JOULE,
-             "Energy for write commands per rank (pJ)"),
-    ADD_STAT(refreshEnergy, UNIT_JOULE,
-             "Energy for refresh commands per rank (pJ)"),
-    ADD_STAT(actBackEnergy, UNIT_JOULE,
-             "Energy for active background per rank (pJ)"),
-    ADD_STAT(preBackEnergy, UNIT_JOULE,
-             "Energy for precharge background per rank (pJ)"),
-    ADD_STAT(actPowerDownEnergy, UNIT_JOULE,
-             "Energy for active power-down per rank (pJ)"),
-    ADD_STAT(prePowerDownEnergy, UNIT_JOULE,
-             "Energy for precharge power-down per rank (pJ)"),
-    ADD_STAT(selfRefreshEnergy, UNIT_JOULE,
-             "Energy for self refresh per rank (pJ)"),
+    ADD_STAT(actEnergy, "Energy for activate commands per rank"),
+    ADD_STAT(preEnergy, "Energy for precharge commands per rank"),
+    ADD_STAT(readEnergy, "Energy for read commands per rank"),
+    ADD_STAT(writeEnergy, "Energy for write commands per rank"),
+    ADD_STAT(refreshEnergy, "Energy for refresh commands per rank"),
+    ADD_STAT(actBackEnergy, "Energy for active background per rank"),
+    ADD_STAT(preBackEnergy, "Energy for precharge background per rank"),
+    ADD_STAT(actPowerDownEnergy, "Energy for active power-down per rank"),
+ ADD_STAT(prePowerDownEnergy, "Energy for precharge power-down per rank"),
+    ADD_STAT(selfRefreshEnergy, "Energy for self refresh per rank"),

-    ADD_STAT(totalEnergy, UNIT_JOULE, "Total energy per rank (pJ)"),
-    ADD_STAT(averagePower, UNIT_WATT, "Core power per rank (mW)"),
+    ADD_STAT(totalEnergy, "Total energy per rank"),
+    ADD_STAT(averagePower, "Core power per rank"),

-    ADD_STAT(totalIdleTime, UNIT_TICK, "Total Idle time Per DRAM Rank"),
-    ADD_STAT(pwrStateTime, UNIT_TICK, "Time in different power states")
+    ADD_STAT(totalIdleTime, "Total Idle time Per DRAM Rank"),
+    ADD_STAT(pwrStateTime, "Time in different power states")
 {
 }

@@ -2495,43 +2478,35 @@
     : Stats::Group(&_nvm),
     nvm(_nvm),

-    ADD_STAT(readBursts, UNIT_COUNT, "Number of NVM read bursts"),
-    ADD_STAT(writeBursts, UNIT_COUNT, "Number of NVM write bursts"),
+    ADD_STAT(readBursts, "Number of NVM read bursts"),
+    ADD_STAT(writeBursts, "Number of NVM write bursts"),

-    ADD_STAT(perBankRdBursts, UNIT_COUNT, "Per bank write bursts"),
-    ADD_STAT(perBankWrBursts, UNIT_COUNT, "Per bank write bursts"),
+    ADD_STAT(perBankRdBursts, "Per bank write bursts"),
+    ADD_STAT(perBankWrBursts, "Per bank write bursts"),

-    ADD_STAT(totQLat, UNIT_TICK, "Total ticks spent queuing"),
- ADD_STAT(totBusLat, UNIT_TICK, "Total ticks spent in databus transfers"),
-    ADD_STAT(totMemAccLat, UNIT_TICK,
+    ADD_STAT(totQLat, "Total ticks spent queuing"),
+    ADD_STAT(totBusLat, "Total ticks spent in databus transfers"),
+    ADD_STAT(totMemAccLat,
              "Total ticks spent from burst creation until serviced "
              "by the NVM"),
-    ADD_STAT(avgQLat, UNIT_RATE(Stats::Units::Tick, Stats::Units::Count),
-             "Average queueing delay per NVM burst"),
-    ADD_STAT(avgBusLat, UNIT_RATE(Stats::Units::Tick, Stats::Units::Count),
-             "Average bus latency per NVM burst"),
- ADD_STAT(avgMemAccLat, UNIT_RATE(Stats::Units::Tick, Stats::Units::Count),
-             "Average memory access latency per NVM burst"),
+    ADD_STAT(avgQLat, "Average queueing delay per NVM burst"),
+    ADD_STAT(avgBusLat, "Average bus latency per NVM burst"),
+    ADD_STAT(avgMemAccLat, "Average memory access latency per NVM burst"),

-    ADD_STAT(bytesRead, UNIT_BYTE, "Total number of bytes read from DRAM"),
- ADD_STAT(bytesWritten, UNIT_BYTE, "Total number of bytes written to DRAM"),
-    ADD_STAT(avgRdBW, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-             "Average DRAM read bandwidth in MiBytes/s"),
-    ADD_STAT(avgWrBW, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-             "Average DRAM write bandwidth in MiBytes/s"),
-    ADD_STAT(peakBW, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-             "Theoretical peak bandwidth in MiByte/s"),
- ADD_STAT(busUtil, UNIT_RATIO, "NVM Data bus utilization in percentage"),
-    ADD_STAT(busUtilRead, UNIT_RATIO,
-             "NVM Data bus read utilization in percentage"),
-    ADD_STAT(busUtilWrite, UNIT_RATIO,
-             "NVM Data bus write utilization in percentage"),
+    ADD_STAT(bytesRead, "Total number of bytes read from DRAM"),
+    ADD_STAT(bytesWritten, "Total number of bytes written to DRAM"),
+    ADD_STAT(avgRdBW, "Average DRAM read bandwidth in Bytes/s"),
+    ADD_STAT(avgWrBW, "Average DRAM write bandwidth in Bytes/s"),
+    ADD_STAT(peakBW, "Theoretical peak bandwidth in Byte/s"),
+    ADD_STAT(busUtil, "NVM Data bus utilization in percentage"),
+    ADD_STAT(busUtilRead, "NVM Data bus read utilization in percentage"),
+    ADD_STAT(busUtilWrite, "NVM Data bus write utilization in percentage"),

-    ADD_STAT(pendingReads, UNIT_COUNT,
- "Reads issued to NVM for which data has not been transferred"),
-    ADD_STAT(bytesPerBank, UNIT_BYTE,
-             "Bytes read within a bank before loading new bank")
-
+ ADD_STAT(pendingReads, "Reads issued to NVM for which data has not been "
+             "transferred"),
+    ADD_STAT(pendingWrites, "Number of outstanding writes to NVM"),
+    ADD_STAT(bytesPerBank, "Bytes read within a bank before loading "
+             "new bank")
 {
 }

@@ -2550,9 +2525,9 @@
     avgBusLat.precision(2);
     avgMemAccLat.precision(2);

-    avgRdBW.precision(2);
-    avgWrBW.precision(2);
-    peakBW.precision(2);
+    avgRdBW.precision(8);
+    avgWrBW.precision(8);
+    peakBW.precision(8);

     busUtil.precision(2);
     busUtilRead.precision(2);
@@ -2574,12 +2549,11 @@
     avgBusLat = totBusLat / readBursts;
     avgMemAccLat = totMemAccLat / readBursts;

-    avgRdBW = (bytesRead / 1000000) / simSeconds;
-    avgWrBW = (bytesWritten / 1000000) / simSeconds;
-    peakBW = (SimClock::Frequency / nvm.tBURST) *
-              nvm.burstSize / 1000000;
+    avgRdBW = bytesRead / simSeconds;
+    avgWrBW = bytesWritten / simSeconds;
+    peakBW = (SimClock::Frequency / nvm.tBURST) * nvm.burstSize;

-    busUtil = (avgRdBW + avgWrBW) / peakBW * 100;
-    busUtilRead = avgRdBW / peakBW * 100;
-    busUtilWrite = avgWrBW / peakBW * 100;
+    busUtil = (avgRdBW + avgWrBW) / peakBW;
+    busUtilRead = avgRdBW / peakBW;
+    busUtilWrite = avgWrBW / peakBW;
 }

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/41014
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4be712dcc9c37b2d3688f23b074634c981a2e64b
Gerrit-Change-Number: 41014
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen <hoangu...@ucdavis.edu>
Gerrit-MessageType: newchange
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