Hi Everyone, I have three patches that make some small changes to RISC-V's instruction formats and fix some bugs with its handling of floating point instructions that have been sitting unreviewed for a couple of weeks. The patches are #6401 <https://gem5-review.googlesource.com/c/public/gem5/+/6401>, #6402 <https://gem5-review.googlesource.com/c/public/gem5/+/6402>, and #6521 <https://gem5-review.googlesource.com/c/public/gem5/+/6521>. These patches only touch RISC-V, so if nobody reviews them by the end of the week then I'll merge them.
-Alec _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
