changeset e278fa3086b5 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=e278fa3086b5
description:
arm: Don't speculatively access most miscregisters.
Speculative exeuction can cause panics in detailed execution mode that
shouldn't happen.
diffstat:
src/arch/arm/isa/insts/misc.isa | 2 +-
src/arch/arm/miscregs.cc | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diffs (24 lines):
diff -r ffe6ab7141ab -r e278fa3086b5 src/arch/arm/isa/insts/misc.isa
--- a/src/arch/arm/isa/insts/misc.isa Mon Oct 20 18:03:56 2014 -0400
+++ b/src/arch/arm/isa/insts/misc.isa Tue Sep 02 11:26:32 2014 +0100
@@ -219,7 +219,7 @@
msrBankedRegIop = InstObjParams("msr", "MsrBankedReg", "MsrRegOp",
{ "code": msrBankedRegCode,
"predicate_test": predicateTest },
- ["IsSerializeAfter"])
+ ["IsSerializeAfter", "IsNonSpeculative"])
header_output += MsrBankedRegDeclare.subst(msrBankedRegIop)
decoder_output += MsrBankedRegConstructor.subst(msrBankedRegIop)
exec_output += PredOpExecute.subst(msrBankedRegIop)
diff -r ffe6ab7141ab -r e278fa3086b5 src/arch/arm/miscregs.cc
--- a/src/arch/arm/miscregs.cc Mon Oct 20 18:03:56 2014 -0400
+++ b/src/arch/arm/miscregs.cc Tue Sep 02 11:26:32 2014 +0100
@@ -758,7 +758,7 @@
// MISCREG_CNTP_CVAL
bitset<NUM_MISCREG_INFOS>(string("0000000000000001001")),
// MISCREG_CNTP_CVAL_NS
- bitset<NUM_MISCREG_INFOS>(string("1100110011111110000")),
+ bitset<NUM_MISCREG_INFOS>(string("1100110011111110001")),
// MISCREG_CNTP_CVAL_S
bitset<NUM_MISCREG_INFOS>(string("0011001100111110000")),
// MISCREG_CNTV_CVAL
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