changeset e57f5bffc553 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=e57f5bffc553
description:
        cpu: Add writeback modeling for drain functionality

        It is possible for the O3 CPU to consider itself drained and
        later have a squashed instruction perform a writeback.  This
        patch re-adds tracking of in-flight instructions to prevent
        falsely signaling a drained event.

diffstat:

 src/cpu/o3/inst_queue.hh      |  3 +++
 src/cpu/o3/inst_queue_impl.hh |  7 ++++++-
 2 files changed, 9 insertions(+), 1 deletions(-)

diffs (51 lines):

diff -r 7e54a9a9f6b2 -r e57f5bffc553 src/cpu/o3/inst_queue.hh
--- a/src/cpu/o3/inst_queue.hh  Wed Oct 29 23:18:26 2014 -0500
+++ b/src/cpu/o3/inst_queue.hh  Wed Oct 29 23:18:27 2014 -0500
@@ -437,6 +437,9 @@
     /** The number of physical registers in the CPU. */
     unsigned numPhysRegs;
 
+    /** Number of instructions currently in flight to FUs */
+    int wbOutstanding;
+
     /** Delay between commit stage and the IQ.
      *  @todo: Make there be a distinction between the delays within IEW.
      */
diff -r 7e54a9a9f6b2 -r e57f5bffc553 src/cpu/o3/inst_queue_impl.hh
--- a/src/cpu/o3/inst_queue_impl.hh     Wed Oct 29 23:18:26 2014 -0500
+++ b/src/cpu/o3/inst_queue_impl.hh     Wed Oct 29 23:18:27 2014 -0500
@@ -415,6 +415,7 @@
     deferredMemInsts.clear();
     blockedMemInsts.clear();
     retryMemInsts.clear();
+    wbOutstanding = 0;
 }
 
 template <class Impl>
@@ -444,7 +445,9 @@
 bool
 InstructionQueue<Impl>::isDrained() const
 {
-    bool drained = dependGraph.empty() && instsToExecute.empty();
+    bool drained = dependGraph.empty() &&
+                   instsToExecute.empty() &&
+                   wbOutstanding == 0;
     for (ThreadID tid = 0; tid < numThreads; ++tid)
         drained = drained && memDepUnit[tid].isDrained();
 
@@ -723,6 +726,7 @@
     assert(!cpu->switchedOut());
     // The CPU could have been sleeping until this op completed (*extremely*
     // long latency op).  Wake it if it was.  This may be overkill.
+   --wbOutstanding;
     iewStage->wakeCPU();
 
     if (fu_idx > -1)
@@ -823,6 +827,7 @@
             } else {
                 Cycles issue_latency = fuPool->getIssueLatency(op_class);
                 // Generate completion event for the FU
+                ++wbOutstanding;
                 FUCompletion *execution = new FUCompletion(issuing_inst,
                                                            idx, this);
 
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