changeset 6d5fc65d64bd in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=6d5fc65d64bd description: gpu-compute: move disassemle() implementation to GPUStaticInst
diffstat: src/arch/hsail/insts/gpu_static_inst.cc | 11 ----------- src/arch/hsail/insts/gpu_static_inst.hh | 1 - src/gpu-compute/gpu_static_inst.cc | 10 ++++++++++ src/gpu-compute/gpu_static_inst.hh | 2 +- 4 files changed, 11 insertions(+), 13 deletions(-) diffs (59 lines): diff -r 3027d6c34fa4 -r 6d5fc65d64bd src/arch/hsail/insts/gpu_static_inst.cc --- a/src/arch/hsail/insts/gpu_static_inst.cc Wed Oct 26 22:47:01 2016 -0400 +++ b/src/arch/hsail/insts/gpu_static_inst.cc Wed Oct 26 22:47:05 2016 -0400 @@ -50,15 +50,4 @@ { disassembly = opcode; } - - const std::string& - HsailGPUStaticInst::disassemble() - { - if (disassembly.empty()) { - generateDisassembly(); - assert(!disassembly.empty()); - } - - return disassembly; - } } // namespace HsailISA diff -r 3027d6c34fa4 -r 6d5fc65d64bd src/arch/hsail/insts/gpu_static_inst.hh --- a/src/arch/hsail/insts/gpu_static_inst.hh Wed Oct 26 22:47:01 2016 -0400 +++ b/src/arch/hsail/insts/gpu_static_inst.hh Wed Oct 26 22:47:05 2016 -0400 @@ -54,7 +54,6 @@ public: HsailGPUStaticInst(const BrigObject *obj, const std::string &opcode); void generateDisassembly(); - const std::string &disassemble(); uint32_t instSize() { return 4; } bool isValid() const override { return true; } diff -r 3027d6c34fa4 -r 6d5fc65d64bd src/gpu-compute/gpu_static_inst.cc --- a/src/gpu-compute/gpu_static_inst.cc Wed Oct 26 22:47:01 2016 -0400 +++ b/src/gpu-compute/gpu_static_inst.cc Wed Oct 26 22:47:05 2016 -0400 @@ -40,3 +40,13 @@ _instNum(0), _scalarOp(false) { } +const std::string& +GPUStaticInst::disassemble() +{ + if (disassembly.empty()) { + generateDisassembly(); + assert(!disassembly.empty()); + } + + return disassembly; +} diff -r 3027d6c34fa4 -r 6d5fc65d64bd src/gpu-compute/gpu_static_inst.hh --- a/src/gpu-compute/gpu_static_inst.hh Wed Oct 26 22:47:01 2016 -0400 +++ b/src/gpu-compute/gpu_static_inst.hh Wed Oct 26 22:47:05 2016 -0400 @@ -72,7 +72,7 @@ virtual void execute(GPUDynInstPtr gpuDynInst) = 0; virtual void generateDisassembly() = 0; - virtual const std::string &disassemble() = 0; + const std::string& disassemble(); virtual int getNumOperands() = 0; virtual bool isCondRegister(int operandIndex) = 0; virtual bool isScalarRegister(int operandIndex) = 0; _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev