changeset 049273bc03f6 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=049273bc03f6
description:
x86: Fix setting segment bases in real mode.
The data size used for actually writing the base value for the segment
was the
default size, but really it should set the entire value without any
possible
truncation.
diffstat:
src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py | 4 ++--
src/arch/x86/isa/insts/general_purpose/data_transfer/move.py | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diffs (42 lines):
diff -r 8fb2884b0a75 -r 049273bc03f6
src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py
--- a/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py Mon Nov
17 00:20:01 2014 -0800
+++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py Mon Nov
17 01:00:53 2014 -0800
@@ -145,7 +145,7 @@
zexti t3, t1, 15, dataSize=8
slli t3, t3, 4, dataSize=8
wrsel cs, t1, dataSize=2
- wrbase cs, t3
+ wrbase cs, t3, dataSize=8
wrip t0, t2, dataSize=asz
};
@@ -168,7 +168,7 @@
mov t2, t0, t2
slli t3, t1, 4, dataSize=8
wrsel cs, t1, dataSize=2
- wrbase cs, t3
+ wrbase cs, t3, dataSize=8
wrip t0, t2, dataSize=asz
};
'''
diff -r 8fb2884b0a75 -r 049273bc03f6
src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
--- a/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py Mon Nov
17 00:20:01 2014 -0800
+++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py Mon Nov
17 01:00:53 2014 -0800
@@ -215,7 +215,7 @@
zexti t2, regm, 15, dataSize=8
slli t3, t2, 4, dataSize=8
wrsel reg, regm
- wrbase reg, t3
+ wrbase reg, t3, dataSize=8
};
def macroop MOV_REAL_S_M {
@@ -223,7 +223,7 @@
zexti t2, t1, 15, dataSize=8
slli t3, t2, 4, dataSize=8
wrsel reg, t1
- wrbase reg, t3
+ wrbase reg, t3, dataSize=8
};
def macroop MOV_REAL_S_P {
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