Hey folks. One of the last things to sort out before I'd consider the gem5 mutli-ISA support at least usable is that the m5ops_base config parameter defaults to zero, except if you're on x86 where it defaults to 0xffff0000.
I think it would make sense to instead default it to 0 all the time, effectively disabled, and to expect a config to enable it even on x86 to something that makes sense on that platform. Even though 0xffff0000 may be a typical address to use for x86, even there it might not be appropriate, since that's where the BIOS would be if doing a bare metal boot. I think if it's reasonable to expect other ISAs to have to set this address, x86 should be able to manage as well. There is already special handling in se.py for the x86/kvm/se mode combination, so there is an easy place to slot this setting in to at least that config. I think this change makes sense, but before I changed behavior like that (as opposed to just changing implementation), I wanted to check to see if there are any strong opinions out there, or other suggestions for how to handle this. Gabe
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