On Wed, Nov 18, 2009 at 8:39 PM, nathan binkert wrote:
>> ruby: cache configuration fix to use bytes
>> Changed cache size to be in bytes instead of kb so that testers can
>> use very
>> small caches and increase the chance of writeback races.
>
>
>> num_cores = 2
>> -l1_cac
> changeset bc8c8617c4f0 in /z/repo/m5
> details: http://repo.m5sim.org/m5?cmd=changeset;node=bc8c8617c4f0
> description:
> ruby: Added boolean to State Machine parameters
> * * *
> ruby: Removed primitive .hh includes
Not a big deal, but in the future, when you qfold, it scre
Interesting, so these events were getting destroyed, resulting in crap
being on the event queue? I'm sure that this happens elsewhere.
Something to check for. Normally nobody actually terminates a
simulation in such a way that normal destructors get called. What are
you doing?
Nate
On Wed,
> ruby: cache configuration fix to use bytes
> Changed cache size to be in bytes instead of kb so that testers can
> use very
> small caches and increase the chance of writeback races.
> num_cores = 2
> -l1_cache_size_kb = 32
> +l1_cache_size_kb = 32768
I assume that steve
Speaking of unused stuff. Can we start pruning the SLICC grammar?
There's a bunch of syntax that is just not used in any protocols.
e.g. check_stop_slots, check_head, CHIP, THIS. Actually that might be
all of them.
Nate
On Wed, Nov 18, 2009 at 6:05 PM, Brad Beckmann wrote:
> changeset 6b6b8f
In the future, for things like this, you should probably use "hg cp"
to indicate that you forked the file in the history. Same with
memtest_ruby.py.
Nate
On Wed, Nov 18, 2009 at 6:05 PM, Brad Beckmann wrote:
> changeset db88ebe2c9fc in /z/repo/m5
> details: http://repo.m5sim.org/m5?cmd=change
out of curiosity, what is the use case for this? Many exit causes
would cause the simulator to exit immediately when resuming from a
checkpoint.
Nate
On Wed, Nov 18, 2009 at 6:05 PM, Brad Beckmann wrote:
> changeset 463aab78c057 in /z/repo/m5
> details: http://repo.m5sim.org/m5?cmd=changeset;
Can you explain this error better? When did it come up? I'd rather
fix the problem rather than just cover it up.
Nate
On Wed, Nov 18, 2009 at 6:05 PM, Brad Beckmann wrote:
> changeset 62c628499cd4 in /z/repo/m5
> details: http://repo.m5sim.org/m5?cmd=changeset;node=62c628499cd4
> description
Shouldn't this be a fatal() error instead of just silently fixing it to be 0?
Nate
On Wed, Nov 18, 2009 at 6:05 PM, Brad Beckmann wrote:
> changeset c2dfa12ea482 in /z/repo/m5
> details: http://repo.m5sim.org/m5?cmd=changeset;node=c2dfa12ea482
> description:
> ruby: getPort function fix
Is it necessary to duplicate this file? Can memtest.py not be
extended to do this?
Nate
On Wed, Nov 18, 2009 at 6:05 PM, Brad Beckmann wrote:
> changeset 12da457d6e5c in /z/repo/m5
> details: http://repo.m5sim.org/m5?cmd=changeset;node=12da457d6e5c
> description:
> ruby: Ruby memtest p
changeset 289ac904233d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=289ac904233d
description:
m5: refreshed the ruby memtest regression stats
diffstat:
6 files changed, 483 insertions(+), 556 deletions(-)
tests/configs/memtest-ruby.py
changeset 7bf0a839c237 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=7bf0a839c237
description:
Resurrection of the CMP token protocol to GEM5
diffstat:
17 files changed, 1578 insertions(+), 336 deletions(-)
src/mem/protocol/MOESI_CMP_token-L1cache.sm | 351 +
changeset 394bc95d417b in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=394bc95d417b
description:
ruby: removed the chip pointer from MessageBuffer
The Chip object no longer exists and thus is removed from the
MessageBuffer
constructor.
diffstat:
3 files
changeset daf49a57df75 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=daf49a57df75
description:
m5: improvements to the ruby_fs.py file
diffstat:
1 file changed, 24 insertions(+), 5 deletions(-)
configs/example/ruby_fs.py | 29 -
diffs (62
changeset bc8c8617c4f0 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=bc8c8617c4f0
description:
ruby: Added boolean to State Machine parameters
* * *
ruby: Removed primitive .hh includes
diffstat:
1 file changed, 6 insertions(+), 3 deletions(-)
src/mem/
changeset b431ec0ad43d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b431ec0ad43d
description:
ruby: added error message to isinstance check
Added error message when a symbol is not an instance of a particular
expected
type.
diffstat:
1 file changed,
changeset 64b815f299c0 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=64b815f299c0
description:
m5: Added the default m5out directory to the hg ignore list
diffstat:
1 file changed, 1 insertion(+)
.hgignore |1 +
diffs (8 lines):
diff -r 71021368db4a -r 64b815f299
changeset 71021368db4a in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=71021368db4a
description:
ruby: The persistent table files from GEMS
These files are need by the MOESI_CMP_token protocol.
diffstat:
2 files changed, 282 insertions(+)
src/mem/ruby/system/Per
changeset 14c356da6ed3 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=14c356da6ed3
description:
ruby: MOESI hammer support for DMA reads and writes
diffstat:
5 files changed, 657 insertions(+), 62 deletions(-)
src/mem/protocol/MOESI_hammer-dir.sm | 517 +++
changeset 53caf4b9186d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=53caf4b9186d
description:
ruby: Added a memory controller feature to MOESI hammer
diffstat:
4 files changed, 224 insertions(+), 33 deletions(-)
src/mem/protocol/MOESI_hammer-dir.sm | 254 +++
changeset c43f6fdcc24c in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c43f6fdcc24c
description:
ruby: Hammer ruby configuration support
diffstat:
4 files changed, 164 insertions(+), 1 deletion(-)
src/mem/protocol/MOESI_hammer-cache.sm |2
src/mem/ruby/conf
changeset b9c7716f6aa6 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b9c7716f6aa6
description:
ruby: Changes necessary to get the hammer protocol to work in GEM5
diffstat:
5 files changed, 141 insertions(+), 92 deletions(-)
src/mem/protocol/MOESI_hammer-cache.sm | 17
changeset 000fa68c57a9 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=000fa68c57a9
description:
ruby: added the original hammer protocols from old ruby
diffstat:
4 files changed, 1509 insertions(+)
src/mem/protocol/MOESI_hammer-cache.sm | 1104 +
changeset bb675ba62c79 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=bb675ba62c79
description:
ruby: returns the number of LLC needed for broadcast
Added feature to CacheMemory to return the number of last level caches.
This count is need for broadcast p
changeset 13387a838449 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=13387a838449
description:
ruby: cache configuration fix to use bytes
Changed cache size to be in bytes instead of kb so that testers can use
very
small caches and increase the chance o
changeset c82047a62104 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c82047a62104
description:
ruby: fix CacheMemory destructor
diffstat:
1 file changed, 6 insertions(+)
src/mem/ruby/system/CacheMemory.cc |6 ++
diffs (16 lines):
diff -r db88ebe2c9fc -r c8204
changeset db88ebe2c9fc in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=db88ebe2c9fc
description:
ruby: split CacheMemory.hh into a .hh and a .cc
diffstat:
3 files changed, 460 insertions(+), 459 deletions(-)
src/mem/ruby/system/CacheMemory.cc | 459
changeset 8da9d36fc14a in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=8da9d36fc14a
description:
ruby: Added default names to message buffers
Added default names to message buffers created by the simple network.
diffstat:
3 files changed, 10 insertions(+), 26 de
changeset 2d3fc2e6f368 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=2d3fc2e6f368
description:
ruby: slicc method error fix
Added error message when a method call is not supported by an object.
diffstat:
1 file changed, 3 insertions(+)
src/mem/slicc/ast/Method
changeset b3f2dfbe8006 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b3f2dfbe8006
description:
ruby: slicc state machine error fixes
Added error messages when:
- a state does not exist in a machine's list of known states.
- an event does not exis
changeset 4e611eba2b13 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=4e611eba2b13
description:
ruby: slicc action error fix
Small fix to the State Machine error message when duplicate actions are
defined.
diffstat:
1 file changed, 1 insertion(+), 1 deletion(-
changeset 6b6b8f01429c in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=6b6b8f01429c
description:
ruby: Removed unused action z_stall
diffstat:
1 file changed, 4 deletions(-)
src/mem/protocol/MI_example-dma.sm |4
diffs (14 lines):
diff -r 463aab78c057 -r 6b6b8
changeset 463aab78c057 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=463aab78c057
description:
m5: Added option to take a checkpoint at the end of simulation
diffstat:
2 files changed, 6 insertions(+)
configs/common/Options.py|3 +++
configs/common/Simulation.p
changeset db802ee94eb6 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=db802ee94eb6
description:
m5: Fixed bug in atomic cpu destructor
diffstat:
1 file changed, 3 insertions(+)
src/cpu/simple/atomic.cc |3 +++
diffs (13 lines):
diff -r 554d84a850d6 -r db802ee94eb6
changeset 554d84a850d6 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=554d84a850d6
description:
ruby: fixed dma mi example to work with multiple dma ports
diffstat:
4 files changed, 18 insertions(+), 11 deletions(-)
src/mem/protocol/MI_example-dir.sm | 24 +++
changeset 62c628499cd4 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=62c628499cd4
description:
m5: removed master and slave deletions.
The unresolved destructor call caused a seg fault when called.
diffstat:
1 file changed, 2 deletions(-)
src/dev/ide_ctrl.cc |
changeset 788cdecedf9f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=788cdecedf9f
description:
m5: fixed destructor to deschedule the tickEvent and event
diffstat:
1 file changed, 2 insertions(+)
src/dev/mc146818.cc |2 ++
diffs (12 lines):
diff -r c2dfa12ea482 -
changeset c2dfa12ea482 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c2dfa12ea482
description:
ruby: getPort function fix
Fixed RubyMemory::getPort function to not pass in a -1 for the idx
parameter
diffstat:
1 file changed, 9 insertions(+)
src/mem/rubymem.cc
changeset 01202c147598 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=01202c147598
description:
ruby: Added error check for openning the ruby config file
diffstat:
1 file changed, 7 insertions(+)
src/mem/rubymem.cc |7 +++
diffs (19 lines):
diff -r b5101309174
changeset 5ea2e2b3b39f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=5ea2e2b3b39f
description:
ruby: Fixed Directory memory destructor
diffstat:
1 file changed, 7 insertions(+), 4 deletions(-)
src/mem/ruby/system/DirectoryMemory.cc | 11 +++
diffs (22 lines)
changeset c5401cb99aae in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c5401cb99aae
description:
m5: Added isValidSrc and isValidDest calls to packet.hh
diffstat:
1 file changed, 2 insertions(+)
src/mem/packet.hh |2 ++
diffs (19 lines):
diff -r 71b272bd988e -r c54
changeset 630a3d0b7eb7 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=630a3d0b7eb7
description:
m5: Moved profile option since Simulation depends on it.
diffstat:
1 file changed, 1 insertion(+)
configs/common/Options.py |1 +
diffs (11 lines):
diff -r c5401cb99aae
changeset 71b272bd988e in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=71b272bd988e
description:
ruby: included ruby config parameter ports per core
Slightly improved the major hack need to correctly assign the number of
ports
per core. CPUs have two por
changeset b5101309174d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b5101309174d
description:
ruby: Support for merging ALPHA_FS and ruby
Connects M5 cpu and dma ports directly to ruby sequencers and dma
sequencers. Rubymem also includes a pio port so
changeset 668d24eb6e0f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=668d24eb6e0f
description:
ruby: Added more info to bridge error message
diffstat:
1 file changed, 3 insertions(+), 1 deletion(-)
src/mem/bridge.cc |4 +++-
diffs (14 lines):
diff -r 5a879a3513dc
changeset 5a879a3513dc in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=5a879a3513dc
description:
ruby: Ruby 64-bit address output fixes.
diffstat:
4 files changed, 16 insertions(+), 2 deletions(-)
src/mem/ruby/libruby.cc |6 ++
src/mem/ruby/libruby.hh
changeset 12da457d6e5c in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=12da457d6e5c
description:
ruby: Ruby memtest python script.
diffstat:
1 file changed, 119 insertions(+)
configs/example/memtest-ruby.py | 119 +++
diffs (123 line
changeset 81e9d83f87c0 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=81e9d83f87c0
description:
ruby: Ruby debug print fixes.
diffstat:
2 files changed, 22 insertions(+), 10 deletions(-)
src/mem/ruby/common/Debug.cc | 31 +--
src/mem/ruby/c
changeset a22a47e60c21 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=a22a47e60c21
description:
ruby: Ruby destruction fix.
diffstat:
5 files changed, 14 insertions(+), 6 deletions(-)
src/mem/ruby/common/DataBlock.hh |6 +-
src/mem/ruby/common/NetDes
* build/MIPS_SE/tests/fast/quick/00.hello/mips/linux/simple-atomic-ruby
passed.
* build/POWER_SE/tests/fast/quick/00.hello/power/linux/o3-timing passed.
* build/POWER_SE/tests/fast/quick/00.hello/power/linux/simple-atomic passed.
* build/SPARC_SE/tests/fast/quick/02.insttest/sparc/
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