Hi Brad,
Thanks a lot for your reply and also for the explanation.
I am adding a part of the trace output from Bus trace flag.
2265338330001: system.piobus: recvTiming: src 28 dst -1 ReadReq
0x801fc0003fa
2265338330001: system.piobus: The bus is now occupied from tick
2265338330001 to 2265338332
Hi Pritha,
The warnings you mentioned are expected and can be ignored as long as they only
complain about Ruby Sim Objects. The reason for them is the checkpoint you
created using normal ALPHA FS, only checkpointed the Sim Objects used by normal
ALPHA FS, but when a Ruby enabled system loads t
It looks like the right place to place "the code that checks for a fault and
calls the CPU read/write function" would be
BaseDynInst::finishTranslation().
All the code to make this work seems to be there already. If it hits in the
TLB, then TheISA::TLB::translateTiming() should call translation->f
Thank you all for the suggestions!
=== I have the following questions: ===
1. how would M5 support plugins with pseudo instructions in the ISA?
Following Gabe's thoughts:
* M5 can provide general, customizable pseudo instructions
One possibility is to have this pseudo instruction take
