Re: [m5-dev] [PATCH 01 of 10] Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions

What happened with the FloatRF is that other CPU models accessed the FloatRF only through the main "RegFile" object but didnt instantiate the FloatRF separately. Since the InOrder model wanted to instantiate the FloatRF separately then it needs those accessor functions. Kind of odd that it wasnt th

Re: [m5-dev] [PATCH 01 of 10] Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions

Why all the new methods on FloatRegFile? Are they used only by the in-order CPU? I'm just surprised they weren't there already. Also, is this change below really necessary? diff -r 0555121b5c5f -r d4ff65e87a0b src/cpu/inorder/resources/tlb_unit.cc > --- a/src/cpu/inorder/resources/tlb_unit.cc

[m5-dev] [PATCH 01 of 10] Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions

# HG changeset patch # User Korey Sewell # Date 1239339875 14400 # Node ID d4ff65e87a0bad86dd03c19fced4fdcd4ed68782 # Parent 0555121b5c5fb9fdfeb6f232421cf7a6c8d98b59 Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support f