Everyone, this change alters the way that the O3 cpu switches registers from
the atomic cpu. If you use checkpoint/switchover and m5 please test this
(specifically the change to src/cpu/o3/thread_context_impl.hh)
Thanks,
Ali
On Mar 30, 2011, at 4:55 PM, Ali Saidi wrote:
>
>
> On 2011-03-30 15:38:14, Gabe Black wrote:
> > I'm not sure this is right yet. Won't it only copy the USR registers now
> > and leave out all the other modes? Also, is there anything wrong with
> > reading the CPSR, changing the mode, and then writing it back?
>
> Ali Saidi wrote:
> No, N
> On 2011-03-30 15:38:14, Gabe Black wrote:
> > I'm not sure this is right yet. Won't it only copy the USR registers now
> > and leave out all the other modes? Also, is there anything wrong with
> > reading the CPSR, changing the mode, and then writing it back?
>
> Ali Saidi wrote:
> No, N
> On 2011-03-30 15:38:14, Gabe Black wrote:
> > I'm not sure this is right yet. Won't it only copy the USR registers now
> > and leave out all the other modes? Also, is there anything wrong with
> > reading the CPSR, changing the mode, and then writing it back?
>
> Ali Saidi wrote:
> No, N
> On 2011-03-30 15:38:14, Gabe Black wrote:
> > I'm not sure this is right yet. Won't it only copy the USR registers now
> > and leave out all the other modes? Also, is there anything wrong with
> > reading the CPSR, changing the mode, and then writing it back?
No, NumIntRegs is all the regist
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I'm not sure this is right yet. Won't it only copy the USR registers now
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Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan
Binke
