All --
tl;dr: when adding a new instruction into x86, should I use a microop or a
macroop?
I'm working on a project which involves extending x86 with special
instructions for compute-enabled caches. Just to give you a feel for where
we are at in the process: we know we have instructions like "cac
Hi Da,
You likely need to enable gem5's multithreaded mode to get many CPUs to
boot correctly. I've had success with up to 32 cores on a 4-core 8-thread
system. I'm not sure if fs.py automatically does this correctly or not. See
my scripts here:
https://github.com/jlpresearch/gem5/tree/jason/kvm-t
Hi Gus,
The x86 instructions are typically macroops that contain 1 or more microops, so
if you are trying to add an x86 instruction you’ll likely want to define it as
a macroop.
That said, because you’re not actually adding a real x86 instruction, you may
want to look at gem5’s pseudo op infra
Tony, thanks for the quick response!
In response to your suggestion to use a macroop, I have a followup
question: If I define my new instruction as a macroop, at some point does
it have to get translated into one or more microops? Obviously, some of the
macroops are defined as groups of microops;
Hello All,
I wanted to try running gem5-riscv with detailed CPU. I did compile gem5.opt
with the RISCV ISA. But when I tried to run the simulation, it is complaining
the following:
mxm@sever6304:gem5$ build/RISCV/gem5.opt ./configs/example/se.py -I 1100
--cpu-type=Deriv03CPU --caches --l2ca
Hello,
It seems you have typos for both tries. For the first one cpu type should be
"DerivO3CPU" not "Deriv03CPU" (With the letter O not the number 0).
The second error is occuring due to missing a dash symbol for l2_size, there
must be 2 dashes (--l2_size not -l2_size).
Cheers
Serhat Gesoglu
Tony, thanks for the quick response!
In response to your suggestion to use a macroop, I have a followup question: If
I define my new instruction as a macroop, at some point does it have to get
translated into one or more microops? Obviously, some of the macroops are
defined as groups of microo
Hello,
Thanks for the reply. I fixed that and rebuilt GEM5. I made some
micro-architectural modification in the "O3BaseCPU.py", so needed to rebuild
anyways. Still getting error:
mxm@server6304:gem5$ build/RISCV/gem5.opt ./configs/example/se.py -I 1100
--cpu-type=DerivO3CPU --caches --l2cac
Even more weird. I am trying to run with "TimingSimpleCPU", but getting error
saying I am trying to run "AtomicSimpleCPU"!!
mxm@server:gem5$ build/RISCV/gem5.opt ./configs/example/se.py -I 1100
--cpu-type=TimingSimpleCPU --caches --l2cache --l1d_size=8kB --l1i_size=2kB
--l2_size=1MB --l1d_a
Hi Jason,
Thanks a lot! Your scripts work!
I am able to scale up to 40 cores on a compute node with 20 physical cores
/ 40 logical cores with your scripts. So I think the fs.py doesn't do
multithreaded mode correctly for running with kvm cpu. Some of your code
are commented as "required" for runni
Hi. First I want to clarify something about micro and macro ops. Macrops
are always, by definition, composed of microops. Macroops don't actually
have an execute function, they just act as a container for microops that do
the real work. If you're interested in a single instruction that does the
wor
I re-installed everything from scratch (git and then build the gem5.opt for
riscv with the modified O3CPU.py, FUPool.py etc in the o3 folder). But now,
when I run a random test simulation with the "DerivO3CPU", in the
m5out/confing.ini file, I see the CPU type as AtomicSimpleCPU.
**
Hi!
I am new to computer system simulation and GEM5. Recently I run PARSEC
benchmark on Alpha processor in FS mode, the commands I am using for build
and simulation :
scons FULL_SYSTEM=1 build/ALPHA/gem5.opt
build/ALPHA/gem5.opt configs/example/fs.py --cpu-type=timing \
--script=run_scripts/blac
Turns out the problem was using "-cpu-type" instead of using "-cpu-type".
But now this creates another problem. I am getting following error (see below).
mxm@ce6304:gem5$ ./build/RISCV/gem5.opt ./configs/example/se.py -I 1100
--cpu-type=DerivO3CPU --caches -c "spec_riscv/401_bzip2/bzip2_base.
Hi Zhan,
Change your *cpu-type* to *detailed*. Then you will get all the parameters
for your McPAT tool.
Regards,
Midhun P
mail to : midhunpmad...@gmail.com
Mobile : +91-9946001223
On Fri, Feb 16, 2018 at 9:01 AM, Xin Zhan wrote:
> Hi!
>
> I am new to computer system simulation and GEM5. Rec
Hi Zhan,
Regarding that warning, it seems like you didn't install the dependency
package protobuf-compiler. Verify all the below packages are installed
properly.
*sudo apt-get install scons swig gcc g++ m4 python python-dev
libgoogle-perftools-dev protobuf-compiler*
Regards,
Midhun P
mail to :
Hi all,
I am trying to compare a new topology with bus and crossbar topologies.
Crossbar network, i was able to run. I am not able to find and run bus
topology. When i went through the code, i found default network topology is
configured as crossbar. Please help.
Regards,
Midhun P
mail to : midh
Dear Mr. Andreas,
Thanks a lot for your scripts on mcpat.
However, I had tried to convert my stats file and config file to a new xml
file using the GEM5ToMcPAT.py script.
Where, I found that the initial mcpat xml file remained unchanged as the
output file even I used the converting script file of
18 matches
Mail list logo
