Re: [gem5-users] execution problem hello.c in architecture armv8 big.LITTLE

2018-06-03 Thread commerce _com
hi ciro, is there is another solution to solve this problem please, because the execution of the kernel is normal, but the problem is that I think it does not know the comandes line as cd in the script.Rcs, and here is the problem I found: for the command "ls" it works normal here are the image d

Re: [gem5-users] Error in running Moby(Asimbench) benchmark in gem5

2018-06-03 Thread Mitali Sinha
@Haeyoon Cho sorry for late reply. I tried making the changes as follows: gem5/configs/common/FSConfig.py: default_dtbs = { "RealViewEB": None, "RealViewPBX": None, "VExpress_EMM": "armv7_gem5_v1_%dcpu.20170616.dtb" % num_cpus, "VExpress_EMM64": "vexpress.aarch64.2

Re: [gem5-users] execution problem hello.c in architecture armv8 big.LITTLE

2018-06-03 Thread Ciro Santilli
Sorry, those images are undocumented and I don't know how they are generated + parsec is highly unmaintained and not made with cross compilation in mind. The best advice I can give at the moment is: use my setup: https://github.com/cirosantilli/linux-kernel-module-cheat/tree/16de55dd2f89ae44c1ee0f

[gem5-users] L1 dcache misses with full-system simulation

2018-06-03 Thread Choe, Jiwon
Hi, I am running some multicore, multithreaded benchmarks (1 thread/core) on a gem5 full-system simulation, and I am having trouble interpreting the data cache misses that I am seeing. As far as I am concerned, the threads do not share any data. However, I am seeing an increase in data cache miss