Re: [gem5-users] Victim Cache in Ruby

MOESI protocol (MOESI_AMD_Base) models L3 caches as victim caches. Depending on the configuration you want to use, you may be able to use it. Best, On Fri, May 17, 2019 at 11:18 AM S M Farabi Mahmud wrote: > I was planning to make a Victim Cache using the ruby memory system. How to > proceed wi

[gem5-users] Victim Cache in Ruby

I was planning to make a Victim Cache using the ruby memory system. How to proceed with that? I have seen emails where regular victim cache is mentioned. I need Victim Cache which also supports ruby. ___ gem5-users mailing list gem5-users@gem5.org http:/

Re: [gem5-users] Update an architectural register on eviction from dCache

Thank you! This information helps a lot ! On Fri, May 17, 2019 at 2:13 PM Gabe Black wrote: > Hi Abhishek. You would probably want accesses to the MISCREG_* to go find > the cache and ask it what value to reply with instead of the other way > around. The system doesn't necessarily have caches or

Re: [gem5-users] ARM 32/64 Core FS Simulation - No BOOTUP

Hi Ciro, I still not able to boot (32 cores) with the version you recommended. I also tried to use the auto generated dtb, but that didn't help either. Regards Yasir -Original Message- From: Ciro Santilli [mailto:ciro.santi...@arm.com] Sent: 15 May 2019 17:51 To: Qureshi Yasir Mahmood