Re: [gem5-users] Indeterministic gem5 behavior

2019-09-09 Thread Pouya Fotouhi
You can try dumping Exec trace for the last few million ticks and see what is going on in your LSQ and why you have load instruction that is not executed. Best, On Mon, Sep 9, 2019 at 11:28 AM Shehab Elsayed wrote: > I am not sure that prefetch_nta is the problem. For different runs the >

Re: [gem5-users] Indeterministic gem5 behavior

2019-09-09 Thread Shehab Elsayed
I am not sure that prefetch_nta is the problem. For different runs the simulation would fail after different periods after printing the prefetch_ nta warning message. Also, from what I have seen in different posts it seems that this warning has been around for a while. I tried compiling my hello

Re: [gem5-users] Question about muti-processor simulation on se mode

2019-09-09 Thread yuan
Hi, Ciro Santilli, Thanks for your kind help, I have checked the spec2006 benchmarks, it does not spawn threads. Spec2006 is single thread program. That’s why I can not get statistics of all processors. Best, Yuan Sent from Mail for Windows 10 From: Ciro Santilli Sent: Monday, September 9,

Re: [gem5-users] Question about muti-processor simulation on se mode

2019-09-09 Thread Ciro Santilli
On Sun, Sep 8, 2019 at 9:42 AM Ciro Santilli wrote: > > > On Sun, Sep 8, 2019 at 6:52 AM Shougang Yuan wrote: > >> Hi, Crio Santilli, >> >> Thank for your kind help. I have tried this minimal program with the >> command line as follow: >> >> build/X86/gem5.opt configs/example/se.py -c >>

[gem5-users] x86 SUB Instruction Exec Logic

2019-09-09 Thread SHAH HASSAN
Hi, I see SUB instructions are encoded under: src/arch/x86/decoder/one_byte_opcode.isa Can somebody tell me where is the execute logic implemented for SUB instructions ? Shah ___ gem5-users mailing list gem5-users@gem5.org