[gem5-users] Re: gem5 : X86 + GCN3 (gfx801) + test_fwd_lrn

2022-03-15 Thread Matt Sinclair via gem5-users
Hi David, The dynamic register allocation policy allows the GPU to schedule as many wavefronts as there is register space on a CU. By default, the original register allocator released with this GPU model ("simple") only allowed 1 wavefront per CU at a time because the publicly available depend

[gem5-users] Re: gem5 : X86 + GCN3 (gfx801) + test_fwd_lrn

2022-03-15 Thread David Fong via gem5-users
Hi Matt S., Thanks for the detailed reply. I looked at the link you sent me for the weekly run. I see an additional parameter which I didn't use: --reg-alloc-policy=dynamic What does this do ? I was able to run the two other tests you use in your weekly runs : test_fwd_pool, test_bwd_bn for

[gem5-users] Re: Modelling cache flushing on gem5 (RISC-V)

2022-03-15 Thread Ethan Bannister via gem5-users
Dear Eliot, This is all invaluable so thank you for taking the time to message. This message is just my current thinking, so please let me know if I’ve misinterpreted anything. >From what I can now tell, the best way to go is to add a request flag to >mem/request.hh, and then issue the request