[gem5-users] Re: Accessing host devices from gem5 simulator in FS mode.

2023-10-09 Thread Ashan Peiris via gem5-users
Hi Giacomo*,* Thanks for your reply. In my host computer, if I do lspci it shows 20 connected controllers and devices. But in gem5 in FS mode it shows a single IDE as below. root@gem5-host:~# lspci 00:04.0 IDE interface: Intel Corporation 82371AB/EB/MB PIIX4 IDE root@gem5-host:~# Is this

[gem5-users] Re: Accessing host devices from gem5 simulator in FS mode.

2023-10-09 Thread Giacomo Travaglini via gem5-users
Hi Ashan, In a FS simulation you would usually access a device with a driver. In general, it depends on the programming interface of your device. Kind Regards Giacomo From: Ashan Peiris via gem5-users Date: Monday, 9 October 2023 at 18:41 To: gem5-users@gem5.org Cc: Ashan Peiris Subject:

[gem5-users] Re: Undefined reference linker error after adding a custom register class and instructions.

2023-10-09 Thread Leonard Peterson via gem5-users
NVM, I solved it. I forgot to implement my new pure virtual functions from ExecContext class in cpu/checker/cpu.hh. On 2023-10-10 01:07, Leonard Peterson via gem5-users wrote: Hello, I added a custom register class and two instructions manipulating the new register class to the ARM

[gem5-users] Re: Accessing host devices from gem5 simulator in FS mode.

2023-10-09 Thread Ashan Peiris via gem5-users
Hi All, Can anyone please give me a pointer to this? On Sun, Oct 8, 2023 at 10:55 AM Ashan Peiris wrote: > Hi, > > Is there a way to access host devices (Eg : PCIE), from gem5 simulator in > FS mode? > > In SE mode, we have access since it doesn't have its own OS and uses host > OS to run the

[gem5-users] Undefined reference linker error after adding a custom register class and instructions.

2023-10-09 Thread Leonard Peterson via gem5-users
Hello, I added a custom register class and two instructions manipulating the new register class to the ARM architecture. However, at the final step of linking ARM/gem5.OPT, the linker gives seemingly unrelated undefined references: [LINK] -> ARM/gem5.opt /usr/bin/ld:

[gem5-users] Re: Squashing Instructions after Page Table Fault

2023-10-09 Thread Eliot Moss via gem5-users
You observed that the check on line 471 in tlb.cc did not seem to be the one causing the fault in the case you were looking at. It occurs to me that the line 471 check is for a *resident* page. If the page is *not* resident, some other check would apply, and the fault might be raised when the

[gem5-users] Re: Squashing Instructions after Page Table Fault

2023-10-09 Thread Yuan Yao via gem5-users
Hi Robin, The "Page-Fault" message is printed out on the constructor of a fault, so gdb that line and move up frames can help. By the way, a page fault can also be generated during page walks (see

[gem5-users] Re: Squashing Instructions after Page Table Fault

2023-10-09 Thread reverent.green--- via gem5-users
Hey Eliot,   thank you for your help. I experimented with the checks and I was a bit suprised, that the Page Fault seems not to be raised after a unsuccessful user/supervisor check. After enabling the necessary debug flags and including more Debug statements into the code, I observed that the