[gem5-users] Re: Multi-threading in Gem5

Hi Aritra, There is a parameter for parsec benchmark to choose how many threads to run program. It should be `-n thread_num`, here are some parsec examples: https://github.com/bamos/parsec-benchmark#more-examples. For gem5, this parameter can be changed in `configs/example/gem5_library/x86-

[gem5-users] Re: Multi-threading in Gem5

Hi Aritra, I am not entirely certain about the specifics of what you want to do but my assumption is that you intend to execute PARSEC with multiple threads in gem5. The process should align with how you would run PARSEC on a physical hardware machine. Regards, Harshil Patel. On Mon, Nov 13, 2023

[gem5-users] Re: Calculating L1 Cache Miss Penalty per core

Hi Gunjan, I am not an expert at this. I found some stats that represent cache miss latency and might be helpful: overallMisses::processor.cores.core.inst, overallMisses::total, demandMissLatency::processor.cores.core.inst, demandMissLatency::total, overallMissLatency::processor.cores.core.inst, ov

[gem5-users] Inquiry Regarding writecleanBlk() Function and Warning Message in gem5

I need to clean a victim block from the cache instead of evicting it from the last level of the cache (LLC). my objective is to write the block to the main memory without removing it from the LLC. To achieve this, I have identified the writecleanBlk() function within the base cache class as a s

[gem5-users] Multi-threading in Gem5

Hi, Can anyone share the methodology for running multi-threaded programmes in Gem5 FS mode with the Ruby memory model? To be specific, I am interested in the PARSEC benchmark suite. I have the following doubt: Let 'A' be a programme from the PARSEC suite. Let there be 8 cores in the simulated Gem

[gem5-users] Re: RISCV build failure

Getting this error is normally a side-effect of not having enough RAM. We 12GB or more to compile gem5 safely. ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org

[gem5-users] Re: Missing HDF5 libraries

It can be resolved by installing the libraries that are missing. How you do so will different depending on your host system. However, these are just warnings, not errors. gem5 is still usable for the vast majority of cases without these libraries. These warnings simply exist to inform the users

[gem5-users] Re: SPEC2k17 V1.1.9 with gem5 gives errors in SE mode

I think this is an annoying comment to here, but it means there’s an an instruction it doesn’t know how to process. In SE mode the error handling is very unhelpful in telling you what that instruction actually is. I’m almost certain in this case your compilation is including some ISA extension w

[gem5-users] Re: m5.switchCpus for ARM starter_fs.py config

Hi, Did you call m5.instantiate before calling m5.simulate? (I don’t see it from the code snippet you posted) Kind Regards Giacomo From: Tran, Huy Dinh via gem5-users Date: Thursday, 2 November 2023 at 20:33 To: gem5-users@gem5.org Cc: Tran, Huy Dinh Subject: [gem5-users] m5.switchCpus for A

[gem5-users] Re: Run multi-program workload in SE mode

I don’t believe it’s possible to run multiple processes in SE mode. What you can do is have a single muli-threader process. You could construct a single binary which utilizes pthreads and have each thread it run something different, though this could prove difficult to do. __

[gem5-users] Re: m5.switchCpus for ARM starter_fs.py config

What i dont understand here is why do you need cpu switching for starter_fs.py. Couldn't you juse use starter_fs.py to get the checkpoints you need then load these checkopoints into a simulation which uses the stdlib? \ They'll be no easy way of introducing stdlib code like  SimpleSwitchableProc