[gem5-users] Re: Running pthread in gem5 se mode

2021-08-07 Thread Hossein Golestani via gem5-users
Hi Krishnan, The SE mode does not have any thread scheduler. You should have as many cores as the maximum number threads your program may launch. In your example, since your program has two threads, two cores are needed, each running of the threads. Thanks, Hossein On Fri, Aug 6, 2021 at 5:16 A

[gem5-users] Re: Running pthread in gem5 se mode

2021-07-25 Thread Hossein Golestani via gem5-users
[I'm resending my reply without the attachments in case they caused it to get into the spam folder.] Hi Krishnan, I remember that I also failed to build m5threads on a particular system, but I managed to build it on another system with a relatively old config (I have attached the output m5threads

[gem5-users] Re: Running pthread in gem5 se mode

2021-07-24 Thread Hossein Golestani via gem5-users
Hi Krishnan, I use m5threads, which is a light-weight alternative for pthread, to simulate multi-threaded programs in the SE mode: https://github.com/gem5/m5threads (I'm not sure if there are any other ways.) Thanks, Hossein On Sat, Jul 24, 2021 at 11:00 AM krishnan gosakan via gem5-users < gem

[gem5-users] Re: Prefetcher Configurations Issue

2021-07-13 Thread Hossein Golestani via gem5-users
Hi Shawn, As for the error you got, I think TaggedPrefetcher should be properly imported in that script. You could also simply enable the prefetcher in the SE mode by adding the following to se.py (or similarly, in any other configuration script you are using): system.cpu[0].dcache.prefetcher = T

[gem5-users] Re: memory instructions detected as branch: O3CPU SE MODE

2020-12-14 Thread Hossein Golestani via gem5-users
Hi Francisco, I encountered the same issue a while back (look here ). It seems that at the O3 fetch stage, all RISC-V compressed instructions are treated as branches. A dirty solution that worked for me was adding the following if sta