[gem5-users] Simulation of Hybrid Memory in Gem5

I am using gem5 version 22.0. I want to simulate hybrid memory comprising DRAM and NVM. I have written the code to simulate hybrid memory using heterogeneous memory controller as: system.mem_ctrl=HeteroMemCtrl() system.mem_ctrl.dram = DDR3_1600_8x8() system.mem_ctrl.dram.range =

[gem5-users] How to check content of Cache block

Hello everyone, I am working in gem5 version 22.0, I wan to design a cache replacement policy as a part of my research work, which evicts blocks based on the contents i.e. considering a number of zeros and ones. Is there a possibility to get the content of cache blok, in gem5? Thanks and

[gem5-users] Re: what is the significance of hostMemory parameter in stats.txt file

Thank you. On Thu, 30 Mar 2023, 6:30 pm Eliot Moss via gem5-users, wrote: > On 3/30/2023 7:13 AM, Sadhana . via gem5-users wrote: > > > >Can hostMemory parameter value be considered as the memory foot > print size of an application. > > Does it include the memor

[gem5-users] what is the significance of hostMemory parameter in stats.txt file

Can hostMemory parameter value be considered as the memory foot print size of an application. Does it include the memory occupied by the entire application. Thanks and Regards, Sadhana, Research Scholar-NITK, Dept. of Computer Science and Engineering .

[gem5-users] Memory traces from CommMonitor- Packet address versus Page address

I am simulating in gem5 version 22. My aim is to generate memory traces, which should further help in trace based simulations. I want a typical page access pattern. I am able to generate the traces successfully, using commMonitor. However I had the doubt in the trace pattern, whether packet traces

[gem5-users] Conversion of packet address to page address

Hai, I have generated traces using commMonitor in gem5. After decoding the traces, the trace format is given below: 7,r,980,4,256,0 7,r,984,4,256,77000 7,r,988,4,256,126000 8,r,474576,4,10,175000 7,r,992,4,256,238000 7,r,996,4,256,287000 8,w,474576,4,10,336000 7,r,1000,4,256,357000

[gem5-users] Re: Memory traces using CommMonitor

the main memory as your CommMonitor is >> connected between the membus and MemCtrl (and all memory traffic should go >> through it). >> >> -Ayaz >> >> On Mon, Feb 13, 2023 at 7:52 PM Sadhana . via gem5-users < >> gem5-users@gem5.org> wrote: >> >&g

[gem5-users] Re: Memory traces using CommMonitor

traffic should go > through it). > > -Ayaz > > On Mon, Feb 13, 2023 at 7:52 PM Sadhana . via gem5-users < > gem5-users@gem5.org> wrote: > >> I am using gem5 for generation of memory traces. While going through gem5 >> videos I found a method to generate

[gem5-users] Memory traces using CommMonitor

I am using gem5 for generation of memory traces. While going through gem5 videos I found a method to generate traces using commMonitor. I have modified the code as follows: system.comm_monitor=CommMonitor() system.comm_monitor.cpu_side_port=system.membus.mem_side_ports