Dear gem5-ers: While I'm not working on it just at the moment, I was hoping there might be support for dynamic page mapping for I/O devices via the PCIe ATS (Address Translation Services) PRI (Page Request Interface) facility. My reading of the ARM SMMU code is that it is not *quite* there, and I am not sure what would be required to add it. Also, it would be great if it were present for x86 systems. What can folks tell me about all that? :-)
Regards - Eliot _______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org
