Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=7391ff35b241dbcba471e05059b5c05fdc8196db
Commit: 7391ff35b241dbcba471e05059b5c05fdc8196db
Parent: f64fddbeac737bfc8d966423f067a9af9eeec887
Author: Kumar Gala <[EMAIL PROTECTED]>
AuthorDate: Fri Jul 20 13:49:29 2007 -0500
Committer: Kumar Gala <[EMAIL PROTECTED]>
CommitDate: Mon Jul 23 22:30:11 2007 -0500
[POWERPC] Make sure virtual P2P bridge registers are setup on PCIe PHB
For the Freescale PCIe PHBs Not all firmwares setup the virtual P2P
bridge registers properly. Make sure they get setup based on what
the struct pci_controller got from the device tree.
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/fsl_pci.c | 14 ++++++++++++++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index dcd0ca8..f88a9ae 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -118,11 +118,24 @@ static void __devinit quirk_fsl_pcie_transparent(struct
pci_dev *dev)
return;
}
+ /* Clear out any of the virtual P2P bridge registers */
+ pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 0);
+ pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16, 0);
+ pci_write_config_byte(dev, PCI_IO_BASE, 0x10);
+ pci_write_config_byte(dev, PCI_IO_LIMIT, 0);
+ pci_write_config_word(dev, PCI_MEMORY_BASE, 0x10);
+ pci_write_config_word(dev, PCI_MEMORY_LIMIT, 0);
+ pci_write_config_word(dev, PCI_PREF_BASE_UPPER32, 0x0);
+ pci_write_config_word(dev, PCI_PREF_LIMIT_UPPER32, 0x0);
+ pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, 0x10);
+ pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, 0);
+
if (hose->io_resource.flags) {
res = &dev->resource[res_idx++];
res->start = hose->io_resource.start;
res->end = hose->io_resource.end;
res->flags = hose->io_resource.flags;
+ update_bridge_resource(dev, res);
}
for (i = 0; i < 3; i++) {
@@ -130,6 +143,7 @@ static void __devinit quirk_fsl_pcie_transparent(struct
pci_dev *dev)
res->start = hose->mem_resources[i].start;
res->end = hose->mem_resources[i].end;
res->flags = hose->mem_resources[i].flags;
+ update_bridge_resource(dev, res);
}
}
-
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