Re: [hwloc-users] misleading cache size on AMD Opteron 6348?

The hwloc version will likely not change much regarding this hardware bug. Since your hardware/BIOS looks buggy, we can't do much about it except creating a valid XML that you could force to override the normal hardware-based discovery. Brice Le 11/06/2014 21:16, Yury Vorobyov a écrit : > I do

Re: [hwloc-users] misleading cache size on AMD Opteron 6348?

I do not see big difference... This time I used upstream version of hwloc (not git live). $ lstopo * hwloc has encountered what looks like an error from the operating system. * * L3 (P#6 cpuset 0x03f0) intersects

Re: [hwloc-users] misleading cache size on AMD Opteron 6348?

Current BIOS version could be improperly detecting CPUs, which engineering samples of 6348 (all characteristics are same). On Tue, Apr 1, 2014 at 6:59 PM, Yury Vorobyov wrote: > The BIOS has latest version. If I should check some BIOS information, I > have access to

Re: [hwloc-users] misleading cache size on AMD Opteron 6348?

The BIOS has latest version. If I should check some BIOS information, I have access to hardware. Tell me what variables from SMBIOS you want to see? On Fri, Jan 31, 2014 at 1:07 PM, Brice Goglin wrote: > Hello, > > Your BIOS reports invalid L3 cache information. On

Re: [hwloc-users] misleading cache size on AMD Opteron 6348?

Hello, Your BIOS reports invalid L3 cache information. On these processors, the L3 is shared by 6 cores, it covers 6 cores of an entire half-socket NUMA node. But the BIOS says that some L3 are shared between 4 cores, others by 6 cores. And worse it says that some L3 is shared by some cores from