Being inside IBM (Niederland) I have no access to production code to help
out but I could use your expert advice.
I am looking at a project that will require the mapping of PLI load modules.
I am searching for long lost CSECTs of a sunsetted product.
Any tips on dissecting LMODs?
Danke vielm
Sorry I'm late to the game, folks!
File CBT531 contains a Rexx, SVCSRCH, that displays the first 160 bytes in
hex for any/all SVCs. When it encounters an ESR SVC in also displays the table.
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Could the modal commands (IF-THE-ELSE; DO-END; SET MAXCC/LASTCC; CANCEL) be
of any use? IIRC the max CC from IDCAMS is 16. Testing the RC in the JCL for
some strange value (an odd integer?) could then bypass steps of flush the JOB.
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The APIs are there. Were you expecting an OOTB MIB-II agent application?
Ooo! A product idea, perhaps? Uhh, too many non-critical PCs for a Unicenter
or Tivoli to manage, one would think. A mid-tier aggregation is probably
called for.
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What is the maximum size of a z/OS console input message? Stated another
way, how large a number can be in CIBDATLN?
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What does SMFPRMxx look like? Is the USI specified for SUBSYS(STC,...)? The
'OOBE' is not to have the USI driven for STCs.
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CPOOLing is great to get 'stuff' into fixed length buffers.
How about the retrieval operation? 'Data Areas' maps the PXT and PPD with
VSM (IGV-prefixed) macros. But even the cell pool callable services
(CSRx) do not have a mechanism AFAICS.
1. Where do the macros reside? Surely not SYS1.PVTMA
Had the recent opportunity to code some dual-mode (CICS & batch) assembler.
After searching the LISTSERVs the DFHAFCD macro (.SDFHMACS) revealed
itself. The code did not contained CICS EXEC statements and therefore did
not require preprocessing. Upon entry under CICS the registers point into
La-la
Au contraire, the DFHEAI stub is *required* to be the first CSECT in the
module. CICS 'interrogates' modules for it's I-catcher to determine if it is
command level or not. Use the linkage editor NAME statement to point to your
favourite entry point (omitted, admittedly but we're all adults here).
Arrgh!
There is a system-maintained map in the SPD so any other tree structure is
redundant. And with a bit of RR math one gets the pointer array details.
Just looking for a leg-up here.
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>> -Original Message-
>> From: IBM Mainframe Discussion List On Behalf Of Capomaestro
>>
>> Had the recent opportunity to code some dual-mode (CICS & batch) assembler.
>> After searching the LISTSERVs the DFHAFCD macro (.SDFHMACS) revealed
itself. The c
On Wed, 17 Aug 2005 07:40:58 -0500, Chase, John <[EMAIL PROTECTED]> wrote:
>> -Original Message-
>> From: IBM Mainframe Discussion List On Behalf Of Capomaestro
>>
>> [ snip ]
>>
>> If CICS (KCP, which would make the assembler code "main&qu
On Mon, 22 Aug 2005 13:50:44 -0500, Chase, John <[EMAIL PROTECTED]> wrote:
>> -Original Message-
>> From: IBM Mainframe Discussion List On Behalf Of Capomaestro
>>
>> [ snip ]
>>
>> -- -- ---
>>
On Tue, 23 Aug 2005 06:47:33 -0500, Chase, John <[EMAIL PROTECTED]> wrote:
>> -Original Message-
>> From: IBM Mainframe Discussion List On Behalf Of Capomaestro
>>
>> [ snip ]
>>
>> No magic involved. The 'stump' is passed contro
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