From: Zhao Yakui yakui.z...@intel.com
The non-8 BPC can be used for the eDP output device that is
connected through DP-A or DP-D on PCH. In such case we should
set the PIPECONF dither correctly.
Signed-off-by: Zhao Yakui yakui.z...@intel.com
Tested-by: Jan-Hendrik Zab j...@jhz.name
On Fri, 2010-05-28 at 22:04 +0800, Daniel Vetter wrote:
On Tue, May 25, 2010 at 01:06:50PM +0800, Xiang, Haihao wrote:
This interface is the same as drm_intel_bo_alloc except the allocated
size isn't rounded up, so it bypasses the cache bucket.
The size of the BO created by
Another question would be to know if i915 is the correct module for the Intel
HD Graphics from a Clarkdale i3 proc?
Thanks
XabiX
De : Xavier de Almeida xavierdealme...@yahoo.fr
À : intel-gfx@lists.freedesktop.org
Envoyé le : Lun 31 mai 2010, 21h 08min 15s
On Tue, Jun 01, 2010 at 05:17:45PM +0800, Xiang, Haihao wrote:
On Fri, 2010-05-28 at 22:04 +0800, Daniel Vetter wrote:
On Tue, May 25, 2010 at 01:06:50PM +0800, Xiang, Haihao wrote:
This interface is the same as drm_intel_bo_alloc except the allocated
size isn't rounded up, so it bypasses
introduce a new API to exec on BSD ring buffer.
This is needed by H.264 VLD decoding.
Signed-off-by: Xiang Hai hao haihao.xi...@intel.com
Signed-off-by: Zou Nan hai nanhai@intel.com
---
include/drm/i915_drm.h|5 -
intel/intel_bufmgr.c | 13 +
