[Intel-gfx] [PATCH 1/3] drm: add helper function to detect monitor audio capability

To help to determine if digital display port needs to enable audio output or not. This one adds a helper to get monitor's audio capability via EDID CEA extension block. Tested-by: Wu Fengguang fengguang...@intel.com Signed-off-by: Zhenyu Wang zhen...@linux.intel.com ---

[Intel-gfx] [PATCH 2/3] drm/i915: Enable DisplayPort audio

This will turn on DP audio output by checking monitor's audio capability. Signed-off-by: Zhenyu Wang zhen...@linux.intel.com --- drivers/gpu/drm/i915/intel_dp.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c

[Intel-gfx] [PATCH 3/3] drm/i915: Enable HDMI audio for monitor with audio support

Rely on monitor's audio capability to turn on audio output for HDMI. Tested-by: Wu Fengguang fengguang...@intel.com Signed-off-by: Zhenyu Wang zhen...@linux.intel.com --- drivers/gpu/drm/i915/intel_hdmi.c | 12 1 files changed, 8 insertions(+), 4 deletions(-) diff --git

Re: [Intel-gfx] [PATCH] drm/1915: save the right fence registers for Sandybridge

On 2010.09.16 15:59:29 +0800, Yuanhan Liu wrote: Sandybridge uses different address offset(0x10) for fence table registers, so make sure we save the right fence registers before suspend. This would fix bug: https://bugs.freedesktop.org/show_bug.cgi?id=30199 Nice catch! But fence reg

[Intel-gfx] [PATCH][v2] drm/1915: save the right fence registers for Sandybridge

Sandybridge uses different address offset(0x10) for fence table registers, so make sure we have the right fence registers saved before suspend. This would fix bug: https://bugs.freedesktop.org/show_bug.cgi?id=30199 Cc: sta...@kernel.org Signed-off-by: Yuanhan Liu yuanhan@intel.com ---

Re: [Intel-gfx] Interrupt latency on some 945GM platforms

В сообщении от 15 of September 2010 01:41:11 автор Sitsofe Wheeler написал: processor.max_cstate=2 Nope, it doesn't work with max_cstate=2 Perhaps intel_idle is being used? Any mention of it in dmesg? Sitsofe, maybe you misunderstood me, I mean with max_cstate=1 graphics is

Re: [Intel-gfx] Interrupt latency on some 945GM platforms

В сообщении от 16 of September 2010 21:07:39 автор Thomas Gleixner написал: Btw, Jesse, any comments/solutions/workarounds except one with processor.max_cstate=1 in kernel commandline? Should I file a bug on fdo bugzilla? we fixed a HPET related bug a few days ago, which might be the

Re: [Intel-gfx] Interrupt latency on some 945GM platforms

В сообщении от 16 of September 2010 21:30:58 автор Vasily Khoruzhick написал: В сообщении от 16 of September 2010 21:07:39 автор Thomas Gleixner написал: Btw, Jesse, any comments/solutions/workarounds except one with processor.max_cstate=1 in kernel commandline? Should I file a bug on

Re: [Intel-gfx] Interrupt latency on some 945GM platforms

В сообщении от 16 of September 2010 21:50:50 автор Thomas Gleixner написал: Ok. The problematic part of HPET was not the clocksource, it was the clock event device which failed to deliver interrupts occasionally. It was worth a try at least. Hm, it seems that jerky glxgears is not related to