[Intel-gfx] [PATCH 1/2] drm/i915:merge ring_put/get_irq into bsd_ring_put/get_irq

This patch is a clean-up, since ring_put_irq/ring_get_irq are only used by bsd_ring_put_irq and bsd_ring_get_irq. This patch also serve the further fix about irq miss in bsd ring on g4x. Interrupt control interfaces are different between g4x and ironlake, they use different interrupt control reg

[Intel-gfx] [PATCH 2/2] drm/i915:fix irq miss in bsd ring for g4x

This patch depends on patch drm/i915:merge ring_put/get_irq into bsd_ring_put/get_irq On g4x, user interrupt in bsd ring is missed. g4x and ironlake share the same bsd_ring, but their interrupt control interfaces are different, g4x use I915 while ironlake use GT. The interrupt mask reg address

[Intel-gfx] g4x bsd user irq miss fix v2

We need this fix to enable h264 decoding on g4x platform. There are two patches to fix the problem. 1. merge ring irq put-get pair into bsd_ring irq put-get pair 2. add conditional judgment about dev version to use different interrupt control interfaces. As the patches show, g4x

[Intel-gfx] [PATCH 1/2] drm/i915:merge ring_put/get_irq into bsd_ring_put/get_irq v2

This patch is a clean-up, since ring_put_irq/ring_get_irq are only used by bsd_ring_put_irq and bsd_ring_get_irq. This patch also serve the further fix about irq miss in bsd ring on g4x. Interrupt control interfaces are different between g4x and ironlake, they use different interrupt control reg

[Intel-gfx] [PATCH 2/2] drm/i915:fix irq miss in bsd ring for g4x v2

This patch depends on patch drm/i915:merge ring_put/get_irq into bsd_ring_put/get_irq On g4x, user interrupt in bsd ring is missed. g4x and ironlake share the same bsd_ring, but their interrupt control interfaces are different, g4x use I915 while ironlake use GT. The interrupt mask reg address

[Intel-gfx] [PATCH] drm/i915: Try to clarify the function and file naming

To the casual observer, our naming is a mess. However, we did have a plan for how our functions should be named, just we were lax and let cruft accrue. Explain how it was meant to look in the hope that someday it will all make sense. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk ---

Re: [Intel-gfx] [PATCH 2/2] drm/i915:fix irq miss in bsd ring for g4x v2

On Thu, 28 Apr 2011 15:22:05 +0800, Feng, Boqun boqun.f...@intel.com wrote: This patch depends on patch drm/i915:merge ring_put/get_irq into bsd_ring_put/get_irq I'm being a nuisance, but this is the wrong way around. This a bug fix and needs to apply cleanly on top of -fixes and marked for

Re: [Intel-gfx] SandyBridge encoding code merged to libva master

On Wed, 2011-04-27 at 11:07 +0800, Zou, Nanhai wrote: Hi, We have merged HW accelerated SandyBridge encoding code to libva master branch. At this point we support I frame and P frame encoding for H.264 main profile. B frame support, frame rate control, performance tuning

Re: [Intel-gfx] [PATCH 2/2] drm/i915:fix irq miss in bsd ring for g4x v2

I got it. Thanks -Boqun -Original Message- From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Thursday, April 28, 2011 4:03 PM To: Feng, Boqun; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915:fix irq miss in bsd ring for g4x v2 On Thu, 28 Apr 2011

Re: [Intel-gfx] [PATCH 1/3] drm/i915/ringbuffer: kill snb blt workaround

Bleh, I've fat-fingered the fdo address on the first submission, to which Eric replied. Pasting his response below: On Wed, 27 Apr 2011 22:33:35 +0200, Daniel Vetter daniel.vet...@ffwll.ch wrote: This was just to facilitate product enablement with pre-production hw. Allows us to kill quite a

Re: [Intel-gfx] [PATCH] drm/i915: Try to clarify the function and file naming

On Thu, 28 Apr 2011 15:40:43 +0700, Magnus Kessler magnus.kess...@gmx.net wrote: On Thursday 28 April 2011 08:58:18 Chris Wilson wrote: +General notes on file naming + + +File naming is a little more complex due to hysterical raisons that we

[Intel-gfx] fix irq miss in bsd ring on g4x v3

Reverse the order of patches. There are two patches 1. fix user irq miss in BSD ring on g4x 2. clean up unused functions Feng, Boqun ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

[Intel-gfx] [PATCH 1/2] drm/i915: fix user irq miss in BSD ring on g4x

On g4x, user interrupt in BSD ring is missed. g4x and ironlake share the same bsd_ring, but their interrupt control interfaces are different. On g4x i915_enable_irq and i915_disable_irq are used to enable/disable irq,and user interrupt flag in BSD ring on g4x is I915_BSD_USER_INTERRUPT.

[Intel-gfx] [PATCH 2/2] drm/i915: clean up unused ring_get_irq/ring_put_irq functions

This patch depends on patch drm/i915: fix user irq miss in BSD ring on g4x. Once the previous patch apply, ring_get_irq/ring_put_irq become unused. So simply remove them. Signed-off-by: Feng, Boqun boqun.f...@intel.com Reviewed-by: Xiang, Haihao haihao.xi...@intel.com ---

Re: [Intel-gfx] [PATCH 4/4] drm/i915: re-enable rc6 for ironlake

On Wed, Apr 27, 2011 at 03:49:40PM -0700, Jesse Barnes wrote: On Wed, 27 Apr 2011 23:03:14 +0100 Chris Wilson ch...@chris-wilson.co.uk wrote: We should probably just enable fbc on the pipe connected to the internal panel (if any) and keep it disabled otherwise. On Arrandale, fbc is

[Intel-gfx] [PATCH 02/19] drm/i915: split irq handling into per-chipset functions

Set the IRQ handling functions in driver load so they'll just be used directly, rather than branching over most of the code in the chipset functions. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_dma.c | 12 ++ drivers/gpu/drm/i915/i915_drv.h |6

[Intel-gfx] [PATCH 01/19] drm/i915: make FDI training a display function

Rather than branching in ironlake_pch_enable, add a new train_fdi function to the display function pointer struct and use it instead. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.h |2 +- drivers/gpu/drm/i915/intel_display.c |7 +++ 2

[Intel-gfx] [RFC] Ivy Bridge supprt v2

Updated with review comments, just need to check and make sure all the rebasing didn't mess anything up, and of course testing is always needed. Thanks, Jesse ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

[Intel-gfx] [PATCH 03/19] drm/i915: split enable/disable vblank code into chipset specific functions

This makes the Ironlake+ code trivial and generally simplifies things. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_dma.c |4 +++ drivers/gpu/drm/i915/i915_drv.h |2 + drivers/gpu/drm/i915/i915_irq.c | 42 -- 3

[Intel-gfx] [PATCH 04/19] drm/i915: add IS_GEN7 macro to cover Ivy Bridge and later

Note: IS_GEN* are for render related checks. Display and other checks should use IS_MOBILE, IS_$CHIPSET or test for specific features. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.h |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff

[Intel-gfx] [PATCH 05/19] drm/i915: add IS_IVYBRIDGE macro for checks

--- drivers/gpu/drm/i915/i915_drv.h |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 93ac632..3a23de6 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -230,6

[Intel-gfx] [PATCH 08/19] drm/i915: manual FDI training for Ivy Bridge

A0 stepping chips need to use manual training, but the bits have all moved. So fix things up so we can at least train FDI for VGA links. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_reg.h | 10 +++ drivers/gpu/drm/i915/intel_display.c | 128

[Intel-gfx] [PATCH 07/19] drm/i915: add swizzle/tiling support for Ivy Bridge

Treat it like Ironlake and Sandy Bridge. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_gem_tiling.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c

[Intel-gfx] [PATCH 06/19] drm/i915: Ivy Bridge has split display and pipe control

Ivy Bridge has a similar split display controller to Sandy Bridge, so use HAS_PCH_SPLIT. And gen7 also has the pipe control instruction, so use HAS_PIPE_CONTROL as well. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.h |4 ++-- 1 files changed, 2

[Intel-gfx] [PATCH 09/19] drm/i915: automatic FDI training support for Ivy Bridge

Ivy Bridge supports auto-training on the CPU side, so add a separate training function to handle it. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_reg.h |2 + drivers/gpu/drm/i915/intel_display.c | 82 +++-- 2 files

Re: [Intel-gfx] [PATCH 09/19] drm/i915: automatic FDI training support for Ivy Bridge

On Thu, 28 Apr 2011 15:12:55 -0700 Jesse Barnes jbar...@virtuousgeek.org wrote: Ivy Bridge supports auto-training on the CPU side, so add a separate training function to handle it. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_reg.h |2 +

[Intel-gfx] [PATCH 18/19] drm/i915: set IBX pch type explicitly

This is a little less confusing than relying on the implicit zeroing of the dev_priv. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.c |6 +- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c

[Intel-gfx] [PATCH 11/19] drm/i915: interrupt vblank support for Ivy Bridge

Add new interrupt handling functions for Ivy Bridge. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_dma.c | 12 +++- drivers/gpu/drm/i915/i915_drv.h |7 ++ drivers/gpu/drm/i915/i915_irq.c | 156 +++

[Intel-gfx] [PATCH 15/19] agp/intel: add Ivy Bridge support

Just use the Sandy Bridge routines. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/char/agp/intel-agp.c |3 +++ drivers/char/agp/intel-agp.h |8 drivers/char/agp/intel-gtt.c | 10 ++ 3 files changed, 21 insertions(+), 0 deletions(-) diff --git

[Intel-gfx] [PATCH 19/19] drm/i915: split clock gating init into per-chipset functions

This helps contain the mess to init_display() instead. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.h |2 +- drivers/gpu/drm/i915/i915_suspend.c |2 +- drivers/gpu/drm/i915/intel_display.c | 337 +++--- 3 files

[Intel-gfx] [PATCH 16/19] drm/i915: add PantherPoint PCH ID

We can treat PantherPoint as CougarPoint as far as display goes. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c

[Intel-gfx] [PATCH 12/19] drm/i915: page flip support for Ivy Bridge

Treat Ivy Bridge like previous chips as far as flip submission is concerned. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_display.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH 14/19] drm/i915: ring support for Ivy Bridge

Use Sandy Bridge paths in a few places. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_ringbuffer.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c

[Intel-gfx] [PATCH 13/19] drm/i915: untested DP support for Ivy Bridge

Treat it like Sandy Bridge in a few places. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_dp.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index

[Intel-gfx] [PATCH 10/19] drm/i915: treat Ivy Bridge watermarks like Sandy Bridge

Not fully tested. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_display.c |9 - 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3396043..fbb7a6b

[Intel-gfx] [PATCH 17/19] drm/i915: add Ivy Bridge PCI IDs and driver feature structs

There are several variants, set feature bits appropriately for both mobile and desktop parts. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.c | 19 +++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git

Re: [Intel-gfx] [PATCH 01/19] drm/i915: make FDI training a display function

On Thu, 28 Apr 2011 15:12:47 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: Rather than branching in ironlake_pch_enable, add a new train_fdi function to the display function pointer struct and use it instead. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org Reviewed-by: Keith

Re: [Intel-gfx] [PATCH 02/19] drm/i915: split irq handling into per-chipset functions

On Thu, 28 Apr 2011 15:12:48 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: Set the IRQ handling functions in driver load so they'll just be used directly, rather than branching over most of the code in the chipset functions. Reviewed-by: Keith Packard kei...@keithp.com --

Re: [Intel-gfx] [PATCH 03/19] drm/i915: split enable/disable vblank code into chipset specific functions

On Thu, 28 Apr 2011 15:12:49 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: This makes the Ironlake+ code trivial and generally simplifies things. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org Reviewed-by: Keith Packard kei...@keithp.com -- keith.pack...@intel.com

Re: [Intel-gfx] [PATCH 04/19] drm/i915: add IS_GEN7 macro to cover Ivy Bridge and later

On Thu, 28 Apr 2011 15:12:50 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: Note: IS_GEN* are for render related checks. Display and other checks should use IS_MOBILE, IS_$CHIPSET or test for specific features. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org Reviewed-by: Keith

Re: [Intel-gfx] [PATCH 05/19] drm/i915: add IS_IVYBRIDGE macro for checks

On Thu, 28 Apr 2011 15:12:51 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: I don't see a patch in this series that sets this value from the PCI ids. Is that still pending? -- keith.pack...@intel.com pgpfAzxA46ANr.pgp Description: PGP signature

Re: [Intel-gfx] [PATCH 06/19] drm/i915: Ivy Bridge has split display and pipe control

On Thu, 28 Apr 2011 15:12:52 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: Ivy Bridge has a similar split display controller to Sandy Bridge, so use HAS_PCH_SPLIT. And gen7 also has the pipe control instruction, so use HAS_PIPE_CONTROL as well. Signed-off-by: Jesse Barnes

Re: [Intel-gfx] [PATCH 07/19] drm/i915: add swizzle/tiling support for Ivy Bridge

On Thu, 28 Apr 2011 15:12:53 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: Treat it like Ironlake and Sandy Bridge. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org Should use gen = 5? -- keith.pack...@intel.com pgptprXAz4FhS.pgp Description: PGP signature

Re: [Intel-gfx] [PATCH 08/19] drm/i915: manual FDI training for Ivy Bridge

On Thu, 28 Apr 2011 15:12:54 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: + if (IS_GEN6(dev)) { + temp = ~FDI_LINK_TRAIN_NONE; + temp |= FDI_LINK_TRAIN_NONE | FDI_TX_ENHANCE_FRAME_ENABLE; + } else if (IS_IVYBRIDGE(dev)) { + temp =

Re: [Intel-gfx] [PATCH 09/19] drm/i915: automatic FDI training support for Ivy Bridge

On Thu, 28 Apr 2011 15:12:55 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: Ivy Bridge supports auto-training on the CPU side, so add a separate training function to handle it. Let's leave this out of the kernel until we have hardware that actually uses it. -- keith.pack...@intel.com

Re: [Intel-gfx] [PATCH 10/19] drm/i915: treat Ivy Bridge watermarks like Sandy Bridge

On Thu, 28 Apr 2011 15:12:56 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: - if (IS_GEN6(dev)) { + if (IS_GEN6(dev) || IS_IVYBRIDGE(dev)) { IS_GEN6 for SNB and IS_IVYBRIDGE for IVB? More consistency, please. -- keith.pack...@intel.com pgpPesA8nYOAV.pgp

Re: [Intel-gfx] [PATCH 11/19] drm/i915: interrupt vblank support for Ivy Bridge

On Thu, 28 Apr 2011 15:12:57 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: - if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev)) { + if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev)) { IS_G4X || gen = 5 ? Otherwise, this looks good (seems like it's just bit

Re: [Intel-gfx] [PATCH 13/19] drm/i915: untested DP support for Ivy Bridge

On Thu, 28 Apr 2011 15:12:59 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: Treat it like Sandy Bridge in a few places. gen = 6? -- keith.pack...@intel.com pgpqFHB2q8tev.pgp Description: PGP signature ___ Intel-gfx mailing list

Re: [Intel-gfx] [PATCH 14/19] drm/i915: ring support for Ivy Bridge

On Thu, 28 Apr 2011 15:13:00 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: Use Sandy Bridge paths in a few places. gen = 6 ? -- keith.pack...@intel.com pgp6Bmd9mjsyL.pgp Description: PGP signature ___ Intel-gfx mailing list

Re: [Intel-gfx] [PATCH 17/19] drm/i915: add Ivy Bridge PCI IDs and driver feature structs

On Thu, 28 Apr 2011 15:13:03 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: There are several variants, set feature bits appropriately for both mobile and desktop parts. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org Reviewed-by: Keith Packard kei...@keithp.com --

Re: [Intel-gfx] [PATCH 18/19] drm/i915: set IBX pch type explicitly

On Thu, 28 Apr 2011 15:13:04 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: This is a little less confusing than relying on the implicit zeroing of the dev_priv. Thanks. Reviewed-by: Keith Packard kei...@keithp.com -- keith.pack...@intel.com pgpFuOeuyyxOq.pgp Description: PGP

Re: [Intel-gfx] [PATCH 08/19] drm/i915: manual FDI training for Ivy Bridge

On Thu, 28 Apr 2011 15:43:10 -0700 Keith Packard kei...@keithp.com wrote: On Thu, 28 Apr 2011 15:12:54 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: + if (IS_GEN6(dev)) { + temp = ~FDI_LINK_TRAIN_NONE; + temp |= FDI_LINK_TRAIN_NONE |

Re: [Intel-gfx] [PATCH 07/19] drm/i915: add swizzle/tiling support for Ivy Bridge

On Thu, 28 Apr 2011 15:42:13 -0700 Keith Packard kei...@keithp.com wrote: On Thu, 28 Apr 2011 15:12:53 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: Treat it like Ironlake and Sandy Bridge. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org Should use gen = 5? Yeah, probably

Re: [Intel-gfx] [PATCH 10/19] drm/i915: treat Ivy Bridge watermarks like Sandy Bridge

On Thu, 28 Apr 2011 15:46:06 -0700 Keith Packard kei...@keithp.com wrote: On Thu, 28 Apr 2011 15:12:56 -0700, Jesse Barnes jbar...@virtuousgeek.org wrote: - if (IS_GEN6(dev)) { + if (IS_GEN6(dev) || IS_IVYBRIDGE(dev)) { IS_GEN6 for SNB and IS_IVYBRIDGE for IVB?