On Thu, Mar 07, 2013 at 12:22:43AM +0100, Daniel Vetter wrote:
> On Wed, Mar 06, 2013 at 08:03:16PM -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni
> >
> > So don't read it when capturing the error state. This solves
> > "unclaimed register" messages on Haswell when we have a GPU hang.
> >
> >
On Wed, Mar 06, 2013 at 08:03:08PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> We already have the same check on intel_enable_ddi. This patch
> prevents "unclaimed register" messages when the power well is
> disabled.
>
> Signed-off-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_d
On Wed, Mar 06, 2013 at 08:03:12PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> This solves some "unclaimed register" messages when there's a GPU hang
> on Haswell.
>
> Signed-off-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_display.c | 12 +---
> 1 file changed, 9 inse
On Wed, Mar 06, 2013 at 08:03:13PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> So don't read it when capturing the error state. This solves some
> "unclaimed register" messages on Haswell when we hang the GPU.
You're sure about gen4? I haven't really checked but my impression is
that gen
On Wed, Mar 06, 2013 at 08:03:15PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> I couldn't find any evidence that this register exists on Gen2+. On
> Gen 2/3/4 documents this register is listed as reserved and read-only.
> On the newer Gens this register is not even documented.
DSPPOS goe
From: Ville Syrjälä
Set has_aliasing_ppgtt_mapping from i915_ppgtt_{bind,unbind}_object().
This matches what we're doing for has_global_gtt_mapping.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_gem.c| 4 +---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 5 +
drive
On Thu, Mar 7, 2013 at 12:31 PM, wrote:
> From: Ville Syrjälä
>
> Set has_aliasing_ppgtt_mapping from i915_ppgtt_{bind,unbind}_object().
> This matches what we're doing for has_global_gtt_mapping.
>
> Signed-off-by: Ville Syrjälä
The idea behind the split is that those functions are generally
On Thu, Mar 07, 2013 at 01:31:26PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Set has_aliasing_ppgtt_mapping from i915_ppgtt_{bind,unbind}_object().
> This matches what we're doing for has_global_gtt_mapping.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Chris Wilson
On Thu, Mar 07, 2013 at 12:47:59PM +0100, Daniel Vetter wrote:
> On Thu, Mar 7, 2013 at 12:31 PM, wrote:
> > From: Ville Syrjälä
> >
> > Set has_aliasing_ppgtt_mapping from i915_ppgtt_{bind,unbind}_object().
> > This matches what we're doing for has_global_gtt_mapping.
> >
> > Signed-off-by: Vil
On Wed, 2013-02-06 at 11:10 +, Chris Wilson wrote:
> Modifying the clock sources (via the DREF control on the PCH) is a slow
> multi-stage process as we need to let the clocks stabilise between each
> stage. If we are not actually changing the clock sources, then we can
> return early.
>
> Sig
On Wed, 2013-02-06 at 11:10 +, Chris Wilson wrote:
> This will be shared with wrapping the BIOS framebuffer into the fbdev
> later. In the meantime, we can tidy the code slightly and improve the
> error path handling.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/intel_display
If TRANS_DDI_FUNC_CTL has been wrongly programmed with an incorrect
port, we are currently trying to read PORT_CLK_SEL(port) with an
initialized value.
Handle that case by returning PORT_CLK_SEL_NONE and warning about it.
Signed-off-by: Damien Lespiau
to add to first
---
drivers/gpu/drm/i915/i
We weren't initializing wait, which could lead to the use of a random
value from the stack in the "if (wait)" condition.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_ddi.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b
Our static analysis tool noticed that 'reg' could be used uninitialized if
we are trying to get a PLL to drive VGA and SPLL is already in use
(plls->spll_refcoung != 0).
In the (error) case above, let's return false to the caller and emit an
error.
Signed-off-by: Damien Lespiau
---
drivers/gpu/
In the case where the hardware has been wrongly programmed and the EDP
TRANS_DDI_FUNC_CTL register has a bogus value in its EDP Input field, we
were using the pipe variable uninitialized.
In this case, shutdown the transcoder. It will be programmed correctly
the next time we try to enabled eDP.
S
We are really talking about the transcoder function here and the disable
version uses trancoder in its name already, so let's try to be
consistent.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_ddi.c |2 +-
drivers/gpu/drm/i915/intel_display.c |2 +-
drivers/gpu/drm/i9
The port number should always be correctly set. Do the same thing as the
switch above and use BUG() to signal that branch is not supposed to be
taken.
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/intel_dp.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/driv
On Mon, 25 Feb 2013 13:31:42 -0800
Jesse Barnes wrote:
> On Mon, 25 Feb 2013 16:19:53 -0300
> Paulo Zanoni wrote:
>
> > Hi
> >
> > 2013/2/19 Paulo Zanoni :
> > > 2013/2/19 Jesse Barnes :
> > >> Updated with the fix from Ville.
> > >
> > > Very briefly tested on SNB (LVDS) and HSW (eDP + DP). S
On Tue, 26 Feb 2013 14:48:33 +0200
Ville Syrjälä wrote:
> On Mon, Feb 25, 2013 at 07:55:20PM -0300, Rodrigo Vivi wrote:
> > Adding Enable and Disable PSR functionalities. This includes setting the
> > PSR configuration over AUX, sending SDP VSC DIP over the eDP PIPE config,
> > enabling PSR in th
On Wed, 6 Mar 2013 20:03:18 -0300
Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> We're starting to add many IS_HASWELL checks for the power well code,
> so add a HAS_POWER_WELL macro to properly document that we're checking
> for hardware that has the power down well.
>
To be more future proof
On 03/06/2013 03:00 PM, Daniel Vetter wrote:
Hi Hans,
Can you please test with 3.9-rc1? That contains an additional patch
which might prevent the regression. Specifically
commit 9d6d9f19e8146fa24903cb561e204a22232740e3
Author: Mika Kuoppala
Date: Fri Feb 8 16:35:38 2013 +0200
drm/i915:
On 03/06/2013 04:32 PM, Mika Kuoppala wrote:
Hello Hans,
Daniel Vetter writes:
Hi Hans,
Can you please test with 3.9-rc1? That contains an additional patch
which might prevent the regression. Specifically
commit 9d6d9f19e8146fa24903cb561e204a22232740e3
Author: Mika Kuoppala
Date: Fri Fe
On 03/06/2013 11:37 PM, Daniel Vetter wrote:
On Wed, Mar 6, 2013 at 7:39 PM, Hans de Bruin wrote:
On 03/06/2013 03:00 PM, Daniel Vetter wrote:
Hi Hans,
Can you please test with 3.9-rc1? That contains an additional patch
which might prevent the regression. Specifically
commit 9d6d9f19e8146fa
On Tue, 5 Mar 2013 13:56:31 +0100
Daniel Vetter wrote:
> On Fri, Mar 1, 2013 at 11:08 PM, Jesse Barnes
> wrote:
> > From: Pallavi G
> >
> >
> > For high res modes m n p calculation is fixed for VLV platform.
> >
> > Signed-off-by: Vijay Purushothaman
> > Signed-off-by: Pallavi G
> > Signed-o
Hi all,
So new testing round. Highlights:
- Some vlv patches, by far not all (Jesse et al)
- Clean up the HDMI/SDVO #define confusion (Paulo)
- gen2-4 vblank fixes from Ville
- unclaimed register warning fixes for hsw (Paulo)
- complete pageflips which have been stuck in a gpu hang, should prevent
On Wed, 6 Mar 2013 16:21:03 +0530 (IST)
Rohit Jain wrote:
>
>
> On Sat, 2 Mar 2013, Jesse Barnes wrote:
>
> > From: Ben Widawsky
> >
> > Uses slightly different interfaces than other platforms.
> >
> > Signed-off-by: Jesse Barnes
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 148
> > ++
On Tue, 05 Mar 2013 17:10:52 +0200
Jani Nikula wrote:
> On Sat, 02 Mar 2013, Jesse Barnes wrote:
> > The Gunit has a separate reg for this, so allocate some stolen space for
> > the power context and initialize the reg.
> >
> > Signed-off-by: Jesse Barnes
> > ---
> > drivers/gpu/drm/i915/i915_
On Wed, 6 Mar 2013 20:32:22 +0100
Daniel Vetter wrote:
> On Wed, Mar 06, 2013 at 09:19:27PM +0200, Ville Syrjälä wrote:
> > On Wed, Mar 06, 2013 at 08:14:54PM +0100, Daniel Vetter wrote:
> > > On Wed, Mar 06, 2013 at 09:09:06PM +0200, Ville Syrjälä wrote:
> > > > On Wed, Mar 06, 2013 at 07:56:33P
On Mon, 4 Mar 2013 20:29:49 +0200
Ville Syrjälä wrote:
> On Fri, Mar 01, 2013 at 01:14:05PM -0800, Jesse Barnes wrote:
> > Need to make sure sprites are disabled before shutting off a pipe.
>
> But we don't actually turn them off anywhere, do we?
We do at unload time right? But this will catch
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