Re: [Intel-gfx] [PATCH 3/5] drm/i915: introduce i915_hangcheck_ring_hung

2013-05-25 Thread Daniel Vetter
On Fri, May 24, 2013 at 11:26:42AM -0700, Ben Widawsky wrote: > On Mon, May 13, 2013 at 04:32:11PM +0300, Mika Kuoppala wrote: > > In preparation to track per ring progress in hangcheck, > > add i915_hangcheck_ring_hung. > > > > v2: omit dev parameter (Ben Widawsky) > > > > Signed-off-by: Mika Ku

Re: [Intel-gfx] [PATCH] drm/i915: replace snb_update_wm with haswell_update_wm on HSW

2013-05-25 Thread Daniel Vetter
On Fri, May 24, 2013 at 6:20 PM, Ville Syrjälä wrote: > On Fri, May 24, 2013 at 06:13:15PM +0200, Daniel Vetter wrote: >> On Fri, May 24, 2013 at 6:07 PM, Daniel Vetter wrote: >> > pfit_size stores the request mode, which matches crtc->config.requested >> > mode. Instead of jumping through hoops

[Intel-gfx] [PATCH 01/34] drm/i915: pre-fixes for checkpatch

2013-05-25 Thread Ben Widawsky
Since I'll need to modify i915_gem_object_bind_to_gtt(), fix the errors now to get checkpatch to not complain. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 17 +++-- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/

[Intel-gfx] [PATCH 00/34] PPGTT prep part 2 (and unmerged part 1)

2013-05-25 Thread Ben Widawsky
Hello. I'm continuing to develop full PPGTT support for the i915 driver. This series is a follow-up to the previously posted RFC [1]. This series contains reworked versions of the unmerged patches (fingers crossed that I didn't miss review comments). I've rebased this series to hell and back, so I

[Intel-gfx] [PATCH 04/34] drm/i915: context debug messages

2013-05-25 Thread Ben Widawsky
Add some debug messages to help figure out what goes wrong on context initialization. Later in the PPGTT series, I ended up having a lot of failures after reset. In many cases it was extra difficult to debug because I hadn't even realized that contexts failed to reinitialize after reset (again an

[Intel-gfx] [PATCH 05/34] drm/i915: Call context fini at cleanup

2013-05-25 Thread Ben Widawsky
If contexts were actually initialized, and we fail somewhere later during init this would possibly leak memory, and lead to some error messages about unclean takedown. As the odds of this occurring, and someone actually caring/noticing are pretty slim, the patch isn't terribly important. Found by

[Intel-gfx] [PATCH 02/34] drm/i915: use mappable size for fb kickout

2013-05-25 Thread Ben Widawsky
The GTT start is either 0 in the KMS case, or some value which is set only after the init IOCTL in the UMS case. In both cases, we don't have this information until after we've tried to kick out the firmware fb. This patch should have no functional change since we kzalloc the GTT struct anyway. It

[Intel-gfx] [PATCH 06/34] drm/i915: make PDE|PTE platform specific

2013-05-25 Thread Ben Widawsky
Nothing outside of i915_gem_gtt.c and more specifically, the relevant gen specific init function should need to know about number of PDEs, or PTEs per PD. Exposing this will only lead to circumventing using the upcoming VM abstraction. To accomplish this, move the defines into the .c file, rename

[Intel-gfx] [PATCH 03/34] drm/i915: use drm_mm_takedown

2013-05-25 Thread Ben Widawsky
I noticed this while doing the VMA abstraction. AFAICT, it won't actually fix anything, but it is the correct thing to do. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_dma.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/

[Intel-gfx] [PATCH 07/34] drm: Optionally create mm blocks from top-to-bottom

2013-05-25 Thread Ben Widawsky
From: Chris Wilson Clients like i915 needs to segregate cache domains within the GTT which can lead to small amounts of fragmentation. By allocating the uncached buffers from the bottom and the cacheable buffers from the top, we can reduce the amount of wasted space and also optimize allocation o

[Intel-gfx] [PATCH 09/34] drm/i915: Use PDEs as the guard page

2013-05-25 Thread Ben Widawsky
Scary alert. AFAICT, we simply do not need the guard page if we have the PDEs at the top since all prefetching is CS related, and it should always be safe to prefetch into a PDE (provided the PDE is valid). The PDE fetching itself should not be subject to the prefetching problem, though without fu

[Intel-gfx] [PATCH 10/34] drm/i915: cleanup context fini

2013-05-25 Thread Ben Widawsky
With the introduction of context refcounting we never explicitly ref/unref the backing object. As such, the previous fix was a bit wonky. Aside from fixing the above, this patch also puts us in good shape for an upcoming patch which allows a failure to occur in between context_init and the first d

[Intel-gfx] [PATCH 08/34] drm/i915: Use drm_mm for PPGTT PDEs

2013-05-25 Thread Ben Widawsky
When PPGTT support was originally enabled, it was only designed to support 1 PPGTT. It therefore made sense to simply hide the GGTT space required to enable this from the drm_mm allocator. Since we intend to support full PPGTT, which means more than 1, and they can be created and destroyed ad hoc

[Intel-gfx] [PATCH 11/34] drm/i915: Do a fuller init after reset

2013-05-25 Thread Ben Widawsky
It's convenient to just call i915_gem_init_hw at reset because we'll be adding new things to that function, and having just one function to call instead of reimplementing it in two places is nice. In order to accommodate we cleanup ringbuffers in order to bring them back up cleanly. Optionally, we

[Intel-gfx] [PATCH 12/34] drm/i915: Split context enabling from init

2013-05-25 Thread Ben Widawsky
We **need** to do this for exactly 1 reason, because we want to embed a PPGTT into the context, but we don't want to special case the default context. To achieve that, we must be able to initialize contexts after the GTT is setup (so we can allocate and pin the default context's BO), but before th

[Intel-gfx] [PATCH 14/34] drm/i915: Embed PPGTT into the context

2013-05-25 Thread Ben Widawsky
My long term vision is for contexts to have a 1:1 relationship with a PPGTT. Sharing objects between address spaces would work similarly to the flink/dmabuf model if needed. The only current code to convert is the aliasing PPGTT. The aliasing PPGTT is just the PPGTT for the default context. The o

[Intel-gfx] [PATCH 13/34] drm/i915: destroy i915_gem_init_global_gtt

2013-05-25 Thread Ben Widawsky
In continuing to make default context/aliasing PPGTT behave like any other context/PPGTT pair this patch sets us up by moving the context/PPGTT init to a common location. The resulting code isn't a huge improvement, but that will change in the next patch (at least a bit). Signed-off-by: Ben Widaw

[Intel-gfx] [PATCH 16/34] drm/i915: Really share scratch page

2013-05-25 Thread Ben Widawsky
A previous patch had set up the ppgtt and ggtt to use the same scratch page, but still kept around both pointers. Kill it, it's not needed and gets in our way for upcoming cleanups. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915/i915_gem_gtt.c | 5

[Intel-gfx] [PATCH 15/34] drm/i915: Tie context to PPGTT

2013-05-25 Thread Ben Widawsky
This is the second half to the previous patch in that now if PPGTT fails to come up, contexts are disabled, and we don't even try to bring up contexts when we don't have PPGTT support. NB: PPGTT cleanup is now done in context unreference. NB2: Chris finally gets to disable HW contexts via the PPGT

[Intel-gfx] [PATCH 18/34] drm/i915: Drop dev from pte_encode

2013-05-25 Thread Ben Widawsky
The original pte_encode function needed the dev argument so we could do platform specific handling via IS_GENX, etc. With the merging of a pte encoding function there should never been a need to quirk away gen specific details. The patch doesn't do much but makes the upcoming reworks in gtt/ppgtt/

[Intel-gfx] [PATCH 17/34] drm/i915: Combine scratch members into a struct

2013-05-25 Thread Ben Widawsky
There isn't any special reason to do this other than it makes it obvious that the two members are connected. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 6 -- drivers/gpu/drm/i915/i915_gem_gtt.c | 17 - 2 files changed, 12 insertions(+), 11 deletion

[Intel-gfx] [PATCH 20/34] drm/i915: Move fbc members out of line

2013-05-25 Thread Ben Widawsky
Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_debugfs.c| 2 +- drivers/gpu/drm/i915/i915_drv.h| 48 +++-- drivers/gpu/drm/i915/i915_gem_stolen.c | 20 +++--- drivers/gpu/drm/i915/intel_display.c | 6 ++--- drivers/gpu/drm/i915/intel_

[Intel-gfx] [PATCH 22/34] drm/i915: Move gtt_mtrr to i915_gtt

2013-05-25 Thread Ben Widawsky
for file in `ls drivers/gpu/drm/i915/*.c` ; do sed -i "s/mm.gtt_mtrr/gtt.mtrr/" $file; done Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_dma.c | 18 +- drivers/gpu/drm/i915/i915_drv.h | 4 ++-- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a

[Intel-gfx] [PATCH 19/34] drm/i915: Use gtt shortform where possible

2013-05-25 Thread Ben Widawsky
Just for compactness. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_gtt.c | 36 +++- 1 file changed, 15 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 391cec9..6954e95 1

[Intel-gfx] [PATCH 23/34] drm/i915: Move stolen stuff to i915_gtt

2013-05-25 Thread Ben Widawsky
It doesn't apply to generic VMA, so it belongs with the gtt. for file in `ls drivers/gpu/drm/i915/*.c` ; do sed -i "s/mm.stolen_base/gtt.stolen_base/" $file; done for file in `ls drivers/gpu/drm/i915/*.c` ; do sed -i "s/mm.stolen/gtt.stolen/" $file; done Signed-off-by: Ben Widaws

[Intel-gfx] [PATCH 21/34] drm/i915: Move gtt and ppgtt under address space umbrella

2013-05-25 Thread Ben Widawsky
The GTT and PPGTT can be thought of more generally as GPU address spaces. Many of their actions (insert entries), state (LRU lists) and many of their characteristics (size), can be shared. Do that. Created a i915_gtt_vm helper macro since for now we always want the regular GTT address space. Event

[Intel-gfx] [PATCH 24/34] drm/i915: Move aliasing_ppgtt

2013-05-25 Thread Ben Widawsky
for file in `ls drivers/gpu/drm/i915/*.c` ; do sed -i "s/mm.aliasing/gtt.aliasing/" $file; done Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_debugfs.c| 4 ++-- drivers/gpu/drm/i915/i915_dma.c| 2 +- drivers/gpu/drm/i915/i915_drv.h| 6 +++---

[Intel-gfx] [PATCH 27/34] drm/i915: Create a global list of vms

2013-05-25 Thread Ben Widawsky
After we plumb our code to support multiple address spaces (VMs), there are a few situations where we want to be able to traverse the list of all address spaces in the system. Cases like eviction, or error state collection are obvious example. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 28/34] drm/i915: Start using vm lists

2013-05-25 Thread Ben Widawsky
It's easy enough to test and make sure our list is accurate because we already have a member in place to access our global GTT. By porting that to use our list (which assumes the GGTT is always the first entry) we can verify a decent amount of the code is working correct. NOTE: to do this, we must

[Intel-gfx] [PATCH 25/34] drm/i915: Put the mm in the parent address space

2013-05-25 Thread Ben Widawsky
Every address space should support object allocation. It therefore makes sense to have the allocator be part of the "superclass" which GGTT and PPGTT will derive. Since our maximum address space size is only 2GB we're not yet able to avoid doing allocation/eviction; but we'd hope one day this beco

[Intel-gfx] [PATCH 26/34] drm/i915: Move object tracking lists to new mm

2013-05-25 Thread Ben Widawsky
for file in `ls drivers/gpu/drm/i915/*.c` ; do sed -i "s/dev_priv->mm.bound_list/i915_gtt_mm-\>bound_list/" $file; done for file in `ls drivers/gpu/drm/i915/*.c` ; do sed -i "s/dev_priv->mm.inactive_list/i915_gtt_mm-\>inactive_list/" $file; done for file in `ls drivers/gpu/drm/i915/*.c` ; do sed

[Intel-gfx] [PATCH 30/34] drm: pre allocate node for create_block

2013-05-25 Thread Ben Widawsky
For an upcoming patch where we introduce the i915 VMA, it's ideal to have the drm_mm_node as part of the VMA struct (ie. it's pre-allocated). Part of the conversion to VMAs is to kill off obj->gtt_space. Doing this will break a bunch of code, but amongst them are 2 callers of drm_mm_create_block(),

[Intel-gfx] [PATCH 29/34] drm/i915: Remove object's gtt_offset

2013-05-25 Thread Ben Widawsky
gtt_offset has always been == gtt_space->start. This makes an upcoming change much easier to swallow. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_debugfs.c| 9 --- drivers/gpu/drm/i915/i915_drv.h| 7 - drivers/gpu/drm/i915/i915_gem.c| 43 ++

[Intel-gfx] [PATCH 33/34] drm/i915: Create VMAs (part 2)

2013-05-25 Thread Ben Widawsky
Remove the obj->gtt_space. See if it still works. This validates that what we did in part 1 was correct. BISECT WARNING: This patch was not meant for bisect. If it does end up upstream, it should be included in the 3 part series for creating the VMA. Signed-off-by: Ben Widawsky --- drivers/gpu/

[Intel-gfx] [PATCH 31/34] drm/i915: Getter/setter for object attributes

2013-05-25 Thread Ben Widawsky
This will be handy when we add VMs. It's not strictly, necessary, but it will make the code much cleaner. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_debugfs.c| 24 +-- drivers/gpu/drm/i915/i915_drv.h| 21 + drivers/gpu/drm/i915/i915_gem.c

[Intel-gfx] [PATCH 32/34] drm/i915: Create VMAs (part 1)

2013-05-25 Thread Ben Widawsky
Creates the VMA, but leaves the old obj->gtt_space in place. This primarily just puts the basic infrastructure in place, and helps check for leaks. BISECT WARNING: This patch was not meant for bisect. If it does end up upstream, it should be included in the 3 part series for creating the VMA. Sig

Re: [Intel-gfx] [PATCH 18/34] drm/i915: Drop dev from pte_encode

2013-05-25 Thread Kenneth Graunke
On 05/25/2013 12:26 PM, Ben Widawsky wrote: The original pte_encode function needed the dev argument so we could do platform specific handling via IS_GENX, etc. With the merging of a pte encoding function there should never been a need to quirk away gen specific details. The patch doesn't do muc

[Intel-gfx] [PATCH] drm/i915: Fix error state memory leaks

2013-05-25 Thread Ben Widawsky
Found with kmemleak. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_irq.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 6efe3b0..4df2b3f 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i

Re: [Intel-gfx] [PATCH] drm/i915: Fix error state memory leaks

2013-05-25 Thread Daniel Vetter
On Sat, May 25, 2013 at 02:42:54PM -0700, Ben Widawsky wrote: > Found with kmemleak. > > Signed-off-by: Ben Widawsky Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_irq.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c

[Intel-gfx] [PATCH v3 12/34] drm/i915: Split context enabling from init

2013-05-25 Thread Ben Widawsky
We **need** to do this for exactly 1 reason, because we want to embed a PPGTT into the context, but we don't want to special case the default context. To achieve that, we must be able to initialize contexts after the GTT is setup (so we can allocate and pin the default context's BO), but before th