On Thu, Oct 03, 2013 at 10:18:56PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 03, 2013 at 11:35:46AM -0700, Jesse Barnes wrote:
> > DPIO needs to have common reset de-asserted on soft resets like boot and
> > S3. In some cases, the BIOS will have done this for us, but it should
> > be safe to do at
On Thu, Oct 03, 2013 at 07:34:48PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 03, 2013 at 11:16:17PM +0800, Chon Ming Lee wrote:
> > During system boot up, by default, the power gate for render, media and
> > display well still power gated. Normally, BIOS will turn off the power
> > gate. In the B
On Mon, Sep 30, 2013 at 02:21:50PM +0100, Damien Lespiau wrote:
> When booting with i915.fastboot=1, we always take tha code path and end
> up undoing what we're trying to do with adjusted_mode.
>
> Hopefully, as the fastboot hardware readout code is using adjusted_mode
> as well, it should be equ
Since we are waiting upon IO completion, inform the kernel through use
of the io_schedule() call rather than the regular schedule(). This
should allow the kernel to make better decisions regarding scheduling
and power management.
Signed-off-by: Chris Wilson
Cc: Daniel Vetter
---
drivers/gpu/drm
Hi all,
New -testing cycle with cool stuff:
- Stereo/3d support for hdmi from Damien, both the drm core bits and
the i915 integration.
- Manual boost/deboost logic for gpu turbo (Chris)
- Fixed up clock readout support for vlv (Chris).
- Tons of little fixes and improvements for vlv in general (
On Fri, Oct 04, 2013 at 09:58:46AM +0100, Chris Wilson wrote:
> Since we are waiting upon IO completion, inform the kernel through use
> of the io_schedule() call rather than the regular schedule(). This
> should allow the kernel to make better decisions regarding scheduling
> and power management.
The interface uses an unsigned long, and we can use the unsigned counter
throughout our code, so do so. In the process, we notice one instance
where the shrink count is based on a heuristic rather than the result,
and another where we ask for too many pages to be purged.
v2: nr_to_scan needs to be
On Tue, Oct 01, 2013 at 06:02:12PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> We used to call the entire intel specific update_plane hook while
> holding struct_mutex. Actually we only need to hold struct_mutex while
> pinning/unpinning the obj. The plane state itself i
On Tue, Oct 01, 2013 at 06:02:16PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Disable fbc before disabling the primary plane, and enable fbc after
> the primary plane has been enabled again.
>
> Also use intel_disable_fbc() to disable FBC to avoid the pointless
> overh
On Tue, Oct 01, 2013 at 06:02:09PM +0300, ville.syrj...@linux.intel.com wrote:
> Chris asked for some renames and assertions during v1. While adding those I
> noticed that what I did in the original patch 02 didn't match quite so well
> with the assertions. So I modified patch 02 a bit, and that ca
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support for the individual tests with updates
to ACK the tests that are supported (or NAK if the test
fails/is unsupported).
On Fri, Oct 04, 2013 at 11:21:20AM +0100, Chris Wilson wrote:
> On Tue, Oct 01, 2013 at 06:02:12PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > We used to call the entire intel specific update_plane hook while
> > holding struct_mutex. Actually we only need to hold
On Fri, Oct 04, 2013 at 03:32:10AM -0700, Todd Previte wrote:
> This initial patch adds support for automated testing of the source device
> to the i915 driver. Most of this patch is infrastructure for the tests;
> follow up patches will add support for the individual tests with updates
> to ACK th
Signed-off-by: Damien Lespiau
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index b701a26..d1bf800 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915
On Fri, 04 Oct 2013, Todd Previte wrote:
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index ae8dbfb..9fa544b 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -266,9 +266,10 @@
>
> #define DP_TEST_REQUEST 0
Signed-off-by: Jani Nikula
---
include/drm/drm_dp_helper.h |7 +++
1 file changed, 7 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index ae8dbfb..fdf58fa 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -390,4 +390,11 @@
It's not really needed, rather just adds another place to hold
intermediate values that could go wrong, and it's not clear that the
training pattern set or training lane set should be written at this
point at all.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_ddi.c |5 +
driv
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/radeon/atombios_dp.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
b/drivers/gpu/drm/radeon/atombios_dp.c
index 0088541..fb3ae07 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/
The DP spec allows this, and requires it when full link training is
started with non-minimum voltage swing and/or non-zero pre-emphasis.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --g
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 60118da..0ed7717 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/in
On Fri, Oct 04, 2013 at 10:33:00AM +0100, Chris Wilson wrote:
> The interface uses an unsigned long, and we can use the unsigned counter
> throughout our code, so do so. In the process, we notice one instance
> where the shrink count is based on a heuristic rather than the result,
> and another whe
On Fri, Oct 04, 2013 at 01:40:08PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 04, 2013 at 11:21:20AM +0100, Chris Wilson wrote:
> > On Tue, Oct 01, 2013 at 06:02:12PM +0300, ville.syrj...@linux.intel.com
> > wrote:
> > > From: Ville Syrjälä
> > >
> > > We used to call the entire intel specific up
On Fri, Oct 04, 2013 at 12:27:00PM +0100, Damien Lespiau wrote:
> Signed-off-by: Damien Lespiau
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-
On Fri, Oct 04, 2013 at 03:08:47PM +0300, Jani Nikula wrote:
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_dp.c |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 60118da..0ed7717
On Fri, Oct 04, 2013 at 03:08:10PM +0300, Jani Nikula wrote:
> It's not really needed, rather just adds another place to hold
> intermediate values that could go wrong, and it's not clear that the
> training pattern set or training lane set should be written at this
> point at all.
>
> Signed-off-
On Fri, Oct 04, 2013 at 03:08:48PM +0300, Jani Nikula wrote:
> The DP spec allows this, and requires it when full link training is
> started with non-minimum voltage swing and/or non-zero pre-emphasis.
>
> Signed-off-by: Jani Nikula
Looks good.
For the series:
Reviewed-by: Ville Syrjälä
> ---
On Mon, Sep 30, 2013 at 06:06:09PM +0300, Mika Kuoppala wrote:
> ville.syrj...@linux.intel.com writes:
>
> > I only wanted to do some small cleanups to vlv_find_best_dpll(),
> > but it seems I went slightly mad again.
> >
> > After realizing that I have to cook up quite a few more patches,
> > I d
On Wed 2013-09-04 11:08:14, Chris Wilson wrote:
> On Tue, Sep 03, 2013 at 09:06:47PM +0200, Pavel Machek wrote:
> > Hi!
> >
> > I was happily using X... and then screen froze. Mouse still
> > moves. Switching to text console still worked, good. It is first time
> > in a while, normally this machin
On Fri, 04 Oct 2013, Daniel Vetter wrote:
> On Fri, Oct 04, 2013 at 03:08:47PM +0300, Jani Nikula wrote:
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/intel_dp.c |2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c
>> b/d
From: Ville Syrjälä
The VGACNTRL register contains a bunch of other stuff besides
the VGA_DISP_DISABLE bit. When we write the register we always set those
other bits to zero, so normally the current check would work.
However on HSW disabling and re-enabling the power well will reset the
VGACNTRL
Through the magic of igt_skip we only need to fail this subtest, not
the entire thing.
Signed-off-by: Daniel Vetter
---
tests/pc8.c | 35 +--
1 file changed, 13 insertions(+), 22 deletions(-)
diff --git a/tests/pc8.c b/tests/pc8.c
index 9070a6b..e93d928 100644
--
If the test enviroment isn't properly set up we should fail the
testcase, since otherwise there's no way to make sure a feature
actually works.
To cut down on bug triaging time extract the basic test (which was
previously used to skip all subtests) into a "basic" subtest.
Also fail the test hard
On 10/4/13 3:45 AM, Chris Wilson wrote:
On Fri, Oct 04, 2013 at 03:32:10AM -0700, Todd Previte wrote:
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support for the indi
On 10/4/13 4:49 AM, Jani Nikula wrote:
On Fri, 04 Oct 2013, Todd Previte wrote:
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index ae8dbfb..9fa544b 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -266,9 +266,10 @@
#define DP_TEST_REQU
On Fri, 4 Oct 2013 20:32:25 +0300
ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> The VGACNTRL register contains a bunch of other stuff besides
> the VGA_DISP_DISABLE bit. When we write the register we always set those
> other bits to zero, so normally the current check would wor
On Fri, Oct 04, 2013 at 11:07:19AM -0700, Jesse Barnes wrote:
> On Fri, 4 Oct 2013 20:32:25 +0300
> ville.syrj...@linux.intel.com wrote:
>
> > From: Ville Syrjälä
> >
> > The VGACNTRL register contains a bunch of other stuff besides
> > the VGA_DISP_DISABLE bit. When we write the register we al
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support for the individual tests with updates
to ACK the tests that are supported (or NAK if the test
fails/is unsupported).
On VLV/BYT, backlight controls a per-pipe, so when adjusting the
backlight we need to pass the correct info. So make the externally
visible backlight functions take a connector argument, which can be used
internally to figure out the pipe backlight to adjust.
v2: make connector pipe lookup check
Updated these to include Jani's review feedback. Ultimately though, we
need to expand this to properly handle dual-panel support on BYT, or
figure out which is the correct connector in the OpRegion callback code.
I still have an open request from the VBIOS team about that.
And Ville is right that
Ignore this message. Will resend to appropriate thread.
-T
On 10/4/13 12:46 PM, Todd Previte wrote:
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support for the indiv
This initial patch adds support for automated testing of the source device
to the i915 driver. Most of this patch is infrastructure for the tests;
follow up patches will add support for the individual tests with updates
to ACK the tests that are supported (or NAK if the test
fails/is unsupported).
- DP_TEST_LINK_PATTERN is ambiguous, rename to DP_TEST_LINK_VIDEO_PATTERN to
clarify
- Added DP_TEST_LINK_FAUX_PATTERN to support automated testing of Fast AUX
Signed-off-by: Todd Previte
---
include/drm/drm_dp_helper.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/i
With the connector and pipe passed around, we can now set the backlight
on the right pipe on VLV/BYT.
v2: drop combination mode check for VLV (Jani)
add save/restore code for VLV backlight regs (Jani)
check for existing modulation freq when initializing backlight regs (Jani)
Signed-off-by
On Fri, Oct 04, 2013 at 11:11:32AM -0700, Todd Previte wrote:
> On 10/4/13 3:45 AM, Chris Wilson wrote:
> >On Fri, Oct 04, 2013 at 03:32:10AM -0700, Todd Previte wrote:
> >>This initial patch adds support for automated testing of the source device
> >>to the i915 driver. Most of this patch is infra
While merging the drm-intel tree into -next there were conflicts in
drivers/gpu/drm/i915/intel_dp.c between 0cc4b69960 (drm/i915: Mask LPSP
to get PSR working even with Power Well in use by audio) in the drm tree
and 18b5992c37 (drm/i915: Calculate PSR register offsets from base +
gen) from the drm
Hi everybody!
A full Oct-1 build runs fine here, a full Oct-3 builds crashes reliably,
see attached log and diff of version list used.
hardware: AOpen i915GMm-hfs
Will be without email access this weekend.
cu,
Knut
Building to run Linux / i686 (golem.site) Do 3. Okt 09:38:06 | Building to r
On 10/4/13 1:39 PM, Ben Widawsky wrote:
On Fri, Oct 04, 2013 at 11:11:32AM -0700, Todd Previte wrote:
On 10/4/13 3:45 AM, Chris Wilson wrote:
On Fri, Oct 04, 2013 at 03:32:10AM -0700, Todd Previte wrote:
This initial patch adds support for automated testing of the source device
to the i915 dri
On 2013-09-22 20:45 (GMT-0400) Felix Miata composed:
*
Awful (openSUSE 13.1 Beta 1):
glamor-0.5.1-1.1
intel-gpu-tools-1.3-4.4
kernel-desktop-3.11.1-1
libdrm2-2.4.46-2.1
libdrm-intel1-2.4.46-2.1
(no Plymouth)
xf86-video-intel-2.99.902-1.1
xorg-x11-server-7.6_1.14.3-1.1 (se
For upcoming patches which will have GEN specific MMIO functions, we'll
need to initialize the uncore data structure earlier than we do today.
If we do not do this, the following will be problematic:
intel_uncore_sanitize
intel_disable_gt_powersave
gen6_disable_rps
In order to be able to have virtual functions for the MMIO, we need to
use the raw access function. To keep things simple, just move this to
our early_sanitize code in uncore.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_dma.c | 10 --
drivers/gpu/drm/i915/intel_uncore.c
Extracting the MMIO read functionality makes per gen handling a bit
simpler, and the overall function a lot easier to read. The increasing
complexity of reads doesn't get too bad as the generation number
increases:
gen[2-4]: Nothing special
gen5: ILK dummy write workaround
gen6+: forcewake shenani
In preparation for having per GEN MMIO functions, create, and start
using MMIO functions in our uncore data structure. This simply makes the
transition easier by allowing us to just plug in the per GEN stuff
later.
For simplicity, I moved the intel_uncore_init() function down since
those rely on s
Just to make the churn and code duplication in upcoming patches a bit
less, turn code which is common to all GEN MMIO functions into a macro.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_uncore.c | 30 +-
1 file changed, 21 insertions(+), 9 deletions(-)
Similar to the previous patch which implemented GEN specific reads; this
patch does the same for writes. Writes have a bit of adding complexity
due to the FPGA_DBG feature of HSW plus:
gen[2-4]: nothing special
gen5: ILK dummy write
gen[6-7]: forcewake shenanigans
gen[HSW}: forcewake shenanigans +
Now that MMIO has been split up into gen specific functions it is
obvious when HAS_FPGA_DBG_UNCLAIMED, HAS_FORCE_WAKE are needed.
I'm a bit on the fence whether or not to even have the checks at all.
For now I am leaving them there because I think they are valuable for
debug, and early silicon bri
Just to make the churn and code duplication in upcoming patches a bit
less, turn code which is common to all GEN MMIO functions into a macro.
v2: Fix typo in subject
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_uncore.c | 30 +-
1 file changed, 21 inser
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