From: Ville Syrjälä
The sprite planes (in fact all display planes starting from gen4)
support 180 degree rotation. Add the relevant low level bits to the
sprite code to make use of that feature.
The upper layers are not yet plugged in.
v2: HSW handles the rotated buffer offset automagically
v3
From: Sagar Kamble
Primary planes support 180 degree rotation. Expose the feature
through rotation drm property.
v2: Calculating linear/tiled offsets based on pipe source width and
height. Added 180 degree rotation support in ironlake_update_plane.
v3: Checking if CRTC is active before issueing
From: Sagar Kamble
This test will verify 180 degree rotation of CRTC and sprite planes
by grabbing CRC for already rotated image and comparing with CRC calculated
after triggering rotation through DRM property.
v2: Using cairo_rotate to created reference rotated version of CRTC and
Sprite Image.
The ACPI table on ASUS UX302LA has more than 8 output devices under the
graphics controller device node. The problem is, the real active output
device, the LCD panel, is listed the last. The result is, the LCD's
device id doesn't get recorded in the active device list CADL array and
when the _DCS c
On Mon, Feb 10, 2014 at 04:30:51PM +0200, Mika Kuoppala wrote:
> We capture error state not only when the GPU hangs but
> also on other situations as in interrupt errors and
> in situations where we can kick things forward without GPU reset.
> There will be log entry on most of these cases. But as
On Mon, Feb 10, 2014 at 04:30:50PM +0200, Mika Kuoppala wrote:
> From: Chris Wilson
>
> After finding the guilty batch and request, we can use it to find the
> process that submitted the batch and then add the culprit into the error
> state.
>
> This is a slightly different approach from Ben's i
On Mon, Feb 10, 2014 at 04:30:49PM +0200, Mika Kuoppala wrote:
> From: Chris Wilson
>
> In the past, it was possible to have multiple batches per request due to
> a stray signal or ENOMEM. As a result we had to scan each active object
> (filtered by those having the COMMAND domain) for the one th
On Thu, Jan 30, 2014 at 04:53:32PM +0200, Ville Syrjälä wrote:
> On Wed, Jan 29, 2014 at 11:55:31AM -0800, Ben Widawsky wrote:
> > Since the semaphore information is in an object, just dump it, and let
> > the user parse it later.
> >
> > NOTE: The page being used for the semaphores are incoherent
On Thu, Jan 30, 2014 at 02:58:09PM +, Chris Wilson wrote:
> On Thu, Jan 30, 2014 at 04:53:32PM +0200, Ville Syrjälä wrote:
> > On Wed, Jan 29, 2014 at 11:55:31AM -0800, Ben Widawsky wrote:
> > > + obj = error->semaphore_obj;
> > > + if (obj) {
> >
> > Chris will come along and change this to
>
Read out the current plane configuration at init time into a new
plane_config structure. This allows us to track any existing
framebuffers attached to the plane and potentially re-use them in our
fbdev code for a smooth handoff.
v2: update for new pitch_for_width function (Jesse)
comment how
This should allow BIOS fb inheritance to work on ILK+ machines too.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 92 ++
1 file changed, 92 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_di
The BIOS or boot loader will generally create an initial display
configuration for us that includes some set of active pipes and
displays. This routine tries to figure out which pipes and connectors
are active and stuffs them into the crtcs and modes array given to us by
the drm_fb_helper code.
T
Retrieve current framebuffer config info from the regs and create an fb
object for the buffer the BIOS or boot loader left us. This should
allow for smooth transitions to userspace apps once we finish the
initial configuration construction.
v2: check for non-native modes and adjust (Jesse)
fi
We want to do this early on before we try to fetch the plane config,
which depends on some of the pipe config state.
v2: split back out from get_plane_config change (Daniel)
update for recent locking & reset changes (Jesse)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.
From: Daniel Vetter
We want to reuse this in the fbdev initial config code independently
from any fastboot hacks. So allow a bit more flexibility.
v2: Forgot to git add ...
v3: make non-static (Jesse)
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c | 31 ++-
This is a remnant from the subtest code before we had proper
fixture blocks. With those there's no no reason to have igt_skip
calls outside of fixtures or subtests, so we can assert this and
hence always jump out.
Suggested by Thomas Wood since static analyzers got confused about
this.
To check f
Otherwise we'll hit an igt_skip in the exit handler, which upsets
the new in_fixture||in_subtests checks.
Signed-off-by: Daniel Vetter
---
lib/drmtest.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/drmtest.c b/lib/drmtest.c
index 28651cee3da7..f6e6ccbee84a 100644
-
drm/ path is for the headers from kernel sources, without when using
the pkgconfig libdrm version.
Cc: Damien Lespiau
Signed-off-by: Daniel Vetter
---
lib/igt_kms.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/igt_kms.h b/lib/igt_kms.h
index dd84a57328df..26edf4cba170
This way we properly skip instead of failing hard. Just result
polish when running on non-intel systems.
Signed-off-by: Daniel Vetter
---
tests/gem_gtt_hog.c | 4
1 file changed, 4 insertions(+)
diff --git a/tests/gem_gtt_hog.c b/tests/gem_gtt_hog.c
index 53d7dd7c2250..5f14109226d7 100644
Blows up otherwise if there's no intel gpu around.
Signed-off-by: Daniel Vetter
---
tests/gem_close_race.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tests/gem_close_race.c b/tests/gem_close_race.c
index 4485db21180b..2087fed6080d 100644
--- a/tests/gem_close_ra
Caught by the new nasty assert in igt_skip.
Signed-off-by: Daniel Vetter
---
tests/gem_ctx_bad_exec.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/gem_ctx_bad_exec.c b/tests/gem_ctx_bad_exec.c
index 3f6f34d09805..834b5fe30720 100644
--- a/tests/gem_ctx_bad_exec.c
+
igt_simple_main doesn't enumerate subtests ...
Cc: Chris Wilson
Signed-off-by: Daniel Vetter
---
tests/gem_madvise.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/gem_madvise.c b/tests/gem_madvise.c
index a7bd22c3d2b8..17e59754c3b3 100644
--- a/tests/gem_madvise.c
++
On Tue, Feb 11, 2014 at 02:22:37PM -0800, Ben Widawsky wrote:
> On Tue, Feb 11, 2014 at 02:11:04PM -0800, Ben Widawsky wrote:
> > On Thu, Jan 30, 2014 at 02:38:17PM +0200, Ville Syrjälä wrote:
> > > On Wed, Jan 29, 2014 at 11:55:26AM -0800, Ben Widawsky wrote:
> > > > Semaphore signalling works sim
We want to reuse this in the fbdev initial config code independently
from any fastboot hacks. So allow a bit more flexibility.
v2: Forgot to git add ...
Cc: Jesse Barnes
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c | 30 ++
1 file changed, 1
We want to reuse this in the fbdev initial config code independently
from any fastboot hacks. So allow a bit more flexibility.
Cc: Jesse Barnes
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions
On Tue, Feb 11, 2014 at 02:25:43PM -0800, Ben Widawsky wrote:
> On Tue, Feb 11, 2014 at 10:23:38PM +, Chris Wilson wrote:
> > Gut feeling is that it fixes an issue with IVB TLB invalidate.
> > (Not yet sure if the bug I was looking at was accidentally fixed at the
> > same time as testing this.
On Tue, Feb 11, 2014 at 10:23:38PM +, Chris Wilson wrote:
> On Tue, Feb 11, 2014 at 01:48:22PM -0800, Ben Widawsky wrote:
> > On Thu, Jan 30, 2014 at 01:35:41PM +, Chris Wilson wrote:
> > > On Thu, Jan 30, 2014 at 02:18:32PM +0100, Daniel Vetter wrote:
> > > > On Thu, Jan 30, 2014 at 1:46 P
On Tue, Feb 11, 2014 at 01:48:22PM -0800, Ben Widawsky wrote:
> On Thu, Jan 30, 2014 at 01:35:41PM +, Chris Wilson wrote:
> > On Thu, Jan 30, 2014 at 02:18:32PM +0100, Daniel Vetter wrote:
> > > On Thu, Jan 30, 2014 at 1:46 PM, Chris Wilson
> > > wrote:
> > > > Oh. So they changed how post-sy
On Tue, Feb 11, 2014 at 02:11:04PM -0800, Ben Widawsky wrote:
> On Thu, Jan 30, 2014 at 02:38:17PM +0200, Ville Syrjälä wrote:
> > On Wed, Jan 29, 2014 at 11:55:26AM -0800, Ben Widawsky wrote:
> > > Semaphore signalling works similarly to previous GENs with the exception
> > > that the per ring mai
On Wed, Feb 12, 2014 at 12:01:10AM +0200, Imre Deak wrote:
> So far during driver unload we called drm_framebuffer_cleanup() for the
> fbdev fb, which only removes the fb from the drm fb list regardless of
> its reference count, but leaves the fb bound on an active crtc. Since
> the fb's backing st
On Thu, Jan 30, 2014 at 02:38:17PM +0200, Ville Syrjälä wrote:
> On Wed, Jan 29, 2014 at 11:55:26AM -0800, Ben Widawsky wrote:
> > Semaphore signalling works similarly to previous GENs with the exception
> > that the per ring mailboxes no longer exist. Instead you must define
> > your own space, so
On Tue, Feb 11, 2014 at 11:59 AM, wrote:
> From: Sagar Kamble
>
> Primary planes support 180 degree rotation. Expose the feature
> through rotation drm property.
>
> v2: Calculating linear/tiled offsets based on pipe source width and
> height. Added 180 degree rotation support in ironlake_update
On Tue, Feb 11, 2014 at 08:19:13PM +, Chris Wilson wrote:
> On Tue, Feb 11, 2014 at 07:52:06PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > According to BSpec the entire MI_DISPLAY_FLIP packet must be contained
> > in a single cacheline. Make sure that happens.
So far during driver unload we called drm_framebuffer_cleanup() for the
fbdev fb, which only removes the fb from the drm fb list regardless of
its reference count, but leaves the fb bound on an active crtc. Since
the fb's backing storage was freed this could mean we scan some random
memory content
On Tue, Feb 11, 2014 at 6:20 PM, Paulo Zanoni wrote:
> 2014-02-11 15:09 GMT-02:00 Paulo Zanoni :
>> 2014-02-11 13:44 GMT-02:00 Daniel Vetter :
>>> On Tue, Feb 11, 2014 at 4:23 PM, Paulo Zanoni wrote:
2014-02-10 15:23 GMT-02:00 Daniel Vetter :
> On Mon, Feb 10, 2014 at 02:17:03PM +00
On Tue, Feb 11, 2014 at 10:53:40PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 11, 2014 at 12:20:42PM -0800, Ben Widawsky wrote:
> > With the ring mask we now have an easy way to know the number of rings
> > in the system, and therefore can accurately predict the number of dwords
> > to emit for sema
On Thu, Jan 30, 2014 at 01:35:41PM +, Chris Wilson wrote:
> On Thu, Jan 30, 2014 at 02:18:32PM +0100, Daniel Vetter wrote:
> > On Thu, Jan 30, 2014 at 1:46 PM, Chris Wilson
> > wrote:
> > > Oh. So they changed how post-sync writes operated - this should be a
> > > separate fix for stable I be
On Tue, Feb 11, 2014 at 04:29:50PM +0530, sagar.a.kam...@intel.com wrote:
> From: Sagar Kamble
>
> Primary planes support 180 degree rotation. Expose the feature
> through rotation drm property.
>
> v2: Calculating linear/tiled offsets based on pipe source width and
> height. Added 180 degree ro
On Tue, Feb 11, 2014 at 12:20:42PM -0800, Ben Widawsky wrote:
> With the ring mask we now have an easy way to know the number of rings
> in the system, and therefore can accurately predict the number of dwords
> to emit for semaphore signalling. This was not possible (easily)
> previously.
>
> The
On Tue, Feb 11, 2014 at 08:19:13PM +, Chris Wilson wrote:
> On Tue, Feb 11, 2014 at 07:52:06PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > According to BSpec the entire MI_DISPLAY_FLIP packet must be contained
> > in a single cacheline. Make sure that happens.
With the ring mask we now have an easy way to know the number of rings
in the system, and therefore can accurately predict the number of dwords
to emit for semaphore signalling. This was not possible (easily)
previously.
There should be no functional impact, simply fewer instructions emitted.
Whi
On Tue, Feb 11, 2014 at 07:52:06PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> According to BSpec the entire MI_DISPLAY_FLIP packet must be contained
> in a single cacheline. Make sure that happens.
>
> v2: Use intel_ring_begin_cacheline_safe()
> v3: Use intel_ring_cach
We reserve the space for the power context in stolen memory at a fixed
address from a delayed work. This races with the subsequent driver
init/resume code which could allocate something at that address, so the
reservation for the power context fails. Reserve the space up-front, so
this can't happen
On Tue, 11 Feb 2014, "Volkin, Bradley D" wrote:
> On Fri, Feb 07, 2014 at 06:45:48AM -0800, Daniel Vetter wrote:
>> On Fri, Feb 07, 2014 at 03:58:46PM +0200, Jani Nikula wrote:
>> > On Wed, 29 Jan 2014, bradley.d.vol...@intel.com wrote:
>> > > +static int valid_reg(const u32 *table, int count, u32
On Fri, Feb 07, 2014 at 06:45:48AM -0800, Daniel Vetter wrote:
> On Fri, Feb 07, 2014 at 03:58:46PM +0200, Jani Nikula wrote:
> > On Wed, 29 Jan 2014, bradley.d.vol...@intel.com wrote:
> > > +static int valid_reg(const u32 *table, int count, u32 addr)
> > > +{
> > > + if (table && count != 0) {
> >
On Fri, Feb 07, 2014 at 02:48:44PM +, Damien Lespiau wrote:
> The goal of that series is to introduce a small mode setting API to write our
> KMS tests, port kms_pipe_crc_basic and kms_cursor_crc to it and introduce a
> new kms_plane test.
So, I've pushed that series, nobdy seemed opposed to h
From: Ville Syrjälä
According to BSpec the entire MI_DISPLAY_FLIP packet must be contained
in a single cacheline. Make sure that happens.
v2: Use intel_ring_begin_cacheline_safe()
v3: Use intel_ring_cacheline_align() (Chris)
Cc: Bjoern C
Cc: Alexandru DAMIAN
Cc: Enrico Tagliavini
Bugzilla: h
From: Ville Syrjälä
BSpec tells us that the entire MI_DISPLAY_FLIP packet must be contained
within a single cacheline on IVB. This series achieves that.
Changes since my original patch [1]:
* Move the logic into a new intel_ring_begin_cacheline_safe() function
(as suggested by Daniel).
* Actua
From: Ville Syrjälä
intel_ring_cachline_align() emits MI_NOOPs until the ring tail is
aligned to a cacheline boundary.
Cc: Bjoern C
Cc: Alexandru DAMIAN
Cc: Enrico Tagliavini
Suggested-by: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 21 ++
On Tue, 2014-02-11 at 16:56 +0200, Ville Syrjälä wrote:
> On Tue, Feb 11, 2014 at 05:02:31PM +0530, Sagar Arun Kamble wrote:
> > On Mon, 2014-02-10 at 15:32 +0200, Ville Syrjälä wrote:
> > > On Mon, Feb 10, 2014 at 01:01:18PM +0530, sagar.a.kam...@intel.com wrote:
> > > > From: Sagar Kamble
> > >
2014-02-11 15:09 GMT-02:00 Paulo Zanoni :
> 2014-02-11 13:44 GMT-02:00 Daniel Vetter :
>> On Tue, Feb 11, 2014 at 4:23 PM, Paulo Zanoni wrote:
>>>
>>> 2014-02-10 15:23 GMT-02:00 Daniel Vetter :
On Mon, Feb 10, 2014 at 02:17:03PM +, Damien Lespiau wrote:
> On Fri, Jan 17, 2014 at 01:51
On Tue, Feb 11, 2014 at 08:08:27AM -0800, Ben Widawsky wrote:
> On Thu, Jan 30, 2014 at 01:25:42PM +0200, Ville Syrjälä wrote:
> > On Wed, Jan 29, 2014 at 11:55:24AM -0800, Ben Widawsky wrote:
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> inde
2014-02-11 13:44 GMT-02:00 Daniel Vetter :
> On Tue, Feb 11, 2014 at 4:23 PM, Paulo Zanoni wrote:
>>
>> 2014-02-10 15:23 GMT-02:00 Daniel Vetter :
>>> On Mon, Feb 10, 2014 at 02:17:03PM +, Damien Lespiau wrote:
On Fri, Jan 17, 2014 at 01:51:09PM -0200, Paulo Zanoni wrote:
> From: Pau
On Tue, Feb 11, 2014 at 05:50:05PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 11, 2014 at 02:14:28PM +, Chris Wilson wrote:
> > On Tue, Feb 11, 2014 at 03:55:50PM +0200, ville.syrj...@linux.intel.com
> > wrote:
> > > From: Ville Syrjälä
> > >
> > > According to BSpec the entire MI_DISPLAY_FLI
On Thu, Feb 06, 2014 at 11:42:39AM -0200, Rodrigo Vivi wrote:
> Reviewed-by: Rodrigo Vivi
>
> On Wed, Jan 29, 2014 at 2:25 AM, Ben Widawsky
> wrote:
> > Signed-off-by: Ben Widawsky
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
>
On Thu, Jan 30, 2014 at 01:25:42PM +0200, Ville Syrjälä wrote:
> On Wed, Jan 29, 2014 at 11:55:24AM -0800, Ben Widawsky wrote:
> > With the ring mask we now have an easy way to know the number of rings
> > in the system, and therefore can accurately predict the number of dwords
> > to emit for sema
On Tue, Feb 11, 2014 at 05:50:05PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 11, 2014 at 02:14:28PM +, Chris Wilson wrote:
> > On Tue, Feb 11, 2014 at 03:55:50PM +0200, ville.syrj...@linux.intel.com
> > wrote:
> > > From: Ville Syrjälä
> > >
> > > According to BSpec the entire MI_DISPLAY_FLI
On Tue, Feb 11, 2014 at 02:14:28PM +, Chris Wilson wrote:
> On Tue, Feb 11, 2014 at 03:55:50PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > According to BSpec the entire MI_DISPLAY_FLIP packet must be contained
> > in a single cacheline. Make sure that happens.
On Tue, Feb 11, 2014 at 4:23 PM, Paulo Zanoni wrote:
>
> 2014-02-10 15:23 GMT-02:00 Daniel Vetter :
>> On Mon, Feb 10, 2014 at 02:17:03PM +, Damien Lespiau wrote:
>>> On Fri, Jan 17, 2014 at 01:51:09PM -0200, Paulo Zanoni wrote:
>>> > From: Paulo Zanoni
>>> >
>>> > We want to remove those 3 b
Hi
2014-02-10 15:23 GMT-02:00 Daniel Vetter :
> On Mon, Feb 10, 2014 at 02:17:03PM +, Damien Lespiau wrote:
>> On Fri, Jan 17, 2014 at 01:51:09PM -0200, Paulo Zanoni wrote:
>> > From: Paulo Zanoni
>> >
>> > We want to remove those 3 boolean arguments. This is the first step.
>> > The "pipe" p
Since
commit d9255d57147e1dbcebdf6670409c2fa0ac3609e6
Author: Paulo Zanoni
Date: Thu Sep 26 20:05:59 2013 -0300
it became clear that we need to separate the unload sequence into two
parts:
1. remove all interfaces through which new operations on some object
(crtc, encoder, connector) can b
The main point of this patchset is to fix a driver unload bug caused by
incorrect order of dp aux i2c cleanup wrt. destroying the corresponding
encoder/connector objects, see the second patch for details.
Tested on vlv/dp.
v2: move all sysfs removal bits to the new connector->unregister
callb
Atm we set the parent of the dp i2c device to be the correspondig
connector device. During driver cleanup we first remove the connector
device through intel_modeset_cleanup()->drm_sysfs_connector_remove() and
only after that the i2c device through the encoder's destroy callback.
This order is not s
This is the same what we do for DP connectors, so make things more
consistent.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_sdvo.c | 24 +++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/int
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_sdvo.c | 49 +++
1 file changed, 39 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/intel_sdvo.c
index cbc2fee..08af4a1 100644
--- a/drivers/gpu/drm/i
On Tue, Feb 11, 2014 at 05:02:31PM +0530, Sagar Arun Kamble wrote:
> On Mon, 2014-02-10 at 15:32 +0200, Ville Syrjälä wrote:
> > On Mon, Feb 10, 2014 at 01:01:18PM +0530, sagar.a.kam...@intel.com wrote:
> > > From: Sagar Kamble
> > >
> > > With clipped sprites these transformations are not workin
On Tue, Feb 11, 2014 at 10:52 AM, Jani Nikula wrote:
> Retrying indefinitely places too much trust on the aux implementation of
> the sink devices.
>
> Reported-by: Daniel Martin
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71267
> Signed-off-by: Jani Nikula
Brings us closer to the
On Tue, Feb 11, 2014 at 03:55:50PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> According to BSpec the entire MI_DISPLAY_FLIP packet must be contained
> in a single cacheline. Make sure that happens.
>
> v2: Use intel_ring_begin_cacheline_safe()
Ugh, no. Let's not make
From: Ville Syrjälä
BSpec tells us that the entire MI_DISPLAY_FLIP packet must be contained
within a single cacheline on IVB. This series achieves that.
Changes since my original patch [1]:
* Move the logic into a new intel_ring_begin_cacheline_safe() function
(as suggested by Daniel).
* Actua
From: Ville Syrjälä
Move the ring wrap detection out from __intel_ring_prepare() all the way
up to intel_ring_begin(). Also convert intel_ring_begin() into a thin
wrapper that just does the wrap detection, and calls
__intel_ring_begin() which contains the code from the original
intel_ring_begin()
From: Ville Syrjälä
According to BSpec the entire MI_DISPLAY_FLIP packet must be contained
in a single cacheline. Make sure that happens.
v2: Use intel_ring_begin_cacheline_safe()
Cc: Bjoern C
Cc: Alexandru DAMIAN
Cc: Enrico Tagliavini
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=7
From: Ville Syrjälä
Add a special variant of intel_ring_begin() which allows the caller to
specify that a certain subset of the emitted dwords must fall within
a single cacheline.
intel_ring_begin_cacheline_safe() will return the number of extra dwords
that need to be emitted by the caller to pr
On Tue, 2014-02-11 at 12:59 +0100, Daniel Vetter wrote:
> On Tue, Feb 11, 2014 at 05:02:31PM +0530, Sagar Arun Kamble wrote:
> > On Mon, 2014-02-10 at 15:32 +0200, Ville Syrjälä wrote:
> > > On Mon, Feb 10, 2014 at 01:01:18PM +0530, sagar.a.kam...@intel.com wrote:
> > > > From: Sagar Kamble
> > >
On Tue, Feb 11, 2014 at 11:55:30AM +0200, Jani Nikula wrote:
> On Tue, 11 Feb 2014, Vandana Kannan wrote:
> > Instead of modifying intel_panel in lvds_init_connector/dsi_init/
> > edp_init_connector, making changes to move intel_panel->downclock_mode
> > initialization to intel_panel_init()
> >
>
On Tue, Feb 11, 2014 at 05:02:31PM +0530, Sagar Arun Kamble wrote:
> On Mon, 2014-02-10 at 15:32 +0200, Ville Syrjälä wrote:
> > On Mon, Feb 10, 2014 at 01:01:18PM +0530, sagar.a.kam...@intel.com wrote:
> > > From: Sagar Kamble
> > >
> > > With clipped sprites these transformations are not workin
On Tue, 11 Feb 2014, Daniel Vetter wrote:
> Aside: Next two weeks I'll be on vacation, so Jani will take over for a
> bit. Thanks to the new git repo nothing really should change but a
> different guy sending you pull requests.
I'll also be on vacation Feb 17-21.
BR,
Jani.
--
Jani Nikula, Int
We need to first check whether we'll even run the testcase before
deciding to print a premature SKIP/FAIL. Without this and global
skipped resulted in superflous output when running only one testcase.
References: https://bugs.freedesktop.org/show_bug.cgi?id=74100
Signed-off-by: Daniel Vetter
---
Tests _must_ be able to run as non-root and on non-intel platforms,
otherwise the enumeration is busted (since QA enumerates testcases on
a gpu-less xeon box).
Cc: Mika Kuoppala
Signed-off-by: Daniel Vetter
---
tests/gem_reset_stats.c | 13 +++--
1 file changed, 7 insertions(+), 6 delet
Reviewed-by: Sagar Kamble
Tested-by: Sagar Kamble
On Mon, 2014-02-10 at 16:05 +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Make drm_property_create_bitmask() a bit more generic by allowing the
> caller to specify which bits are in fact supported. This allows multiple
>
Hi Dave,
So I send you a "nothing going on" -fixes pull request and then the
regressions roll in ;-) All three regression fixes with cc: stable where
applicable.
Aside: Next two weeks I'll be on vacation, so Jani will take over for a
bit. Thanks to the new git repo nothing really should change bu
From: Ville Syrjälä
The sprite planes (in fact all display planes starting from gen4)
support 180 degree rotation. Add the relevant low level bits to the
sprite code to make use of that feature.
The upper layers are not yet plugged in.
v2: HSW handles the rotated buffer offset automagically
v3
From: Sagar Kamble
Primary planes support 180 degree rotation. Expose the feature
through rotation drm property.
v2: Calculating linear/tiled offsets based on pipe source width and
height. Added 180 degree rotation support in ironlake_update_plane.
v3: Checking if CRTC is active before issueing
On Tue, 11 Feb 2014, Chris Wilson wrote:
> On Tue, Feb 11, 2014 at 11:52:04AM +0200, Jani Nikula wrote:
>> Give more slack to sink devices before retrying on native aux
>> defer. AFAICT the 100 us timeout was not based on the DP spec.
>
> If the issue is that there is an unknown amount of time tha
On Tue, Feb 11, 2014 at 11:52:04AM +0200, Jani Nikula wrote:
> Give more slack to sink devices before retrying on native aux
> defer. AFAICT the 100 us timeout was not based on the DP spec.
If the issue is that there is an unknown amount of time that must be
waited before the device is ready, shou
On Mon, Feb 10, 2014 at 03:32:44PM -0800, Jesse Barnes wrote:
> Just like we have for connector type etc.
>
> v2: drop static array (Chris)
> v3: add kdoc (Daniel)
>
> Signed-off-by: Jesse Barnes
Merged this and the i915 debugfs patch to dinq with Dave's ack.
-Daniel
--
Daniel Vetter
Software
On Tue, 11 Feb 2014, Vandana Kannan wrote:
> Instead of modifying intel_panel in lvds_init_connector/dsi_init/
> edp_init_connector, making changes to move intel_panel->downclock_mode
> initialization to intel_panel_init()
>
> v2: Jani's review comments incorporated
> Removed downclock_mode local
Give more slack to sink devices before retrying on native aux
defer. AFAICT the 100 us timeout was not based on the DP spec.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b
Retrying indefinitely places too much trust on the aux implementation of
the sink devices.
Reported-by: Daniel Martin
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71267
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c | 15 +++
1 file changed, 11 insertions
These should fix the hang in the bug referenced in patch 2/2. Based on
some links the actual error might be a firmware bug in the docking
station, but we shouldn't trust on DP sinks to not keep replying aux
defer indefinitely.
Even with the docking station's firmware fixed, this may not be enough
From: Akash Goel
This adds support for a write-enable bit in the entry of GTT.
This is handled via a read-only flag in the GEM buffer object which
is then used to see how to set the bit when writing the GTT entries.
Currently by default the Batch buffer & Ring buffers are marked as read only.
v2
Instead of modifying intel_panel in lvds_init_connector/dsi_init/
edp_init_connector, making changes to move intel_panel->downclock_mode
initialization to intel_panel_init()
v2: Jani's review comments incorporated
Removed downclock_mode local variable in dsi_init and
edp_init_connector
Signed-off
On Tue, 11 Feb 2014, Vandana Kannan wrote:
> Instead of modifying intel_panel in lvds_init_connector/dsi_init_connector/
> edp_init_connector, making changes to move intel_panel->downclock_mode
> initialization to intel_panel_init()
>
> Signed-off-by: Vandana Kannan
> Signed-off-by: Pradeep Bhat
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