On Thu, Mar 06, 2014 at 11:19:54AM +1030, Rusty Russell wrote:
> Daniel Vetter writes:
> > Users just love to set random piles of options since surely enabling
> > all the experimental stuff helps. Later on we get bug reports because
> > it all fell apart.
> >
> > Even more fun when it's labelled
From: Sagar Kamble
Started documenting drm properties for drm drivers. This patch provides
information about properties in drm, i915, psb and cdv/gma-500. Information
about other properties can be added on top of these.
v2: Added description of drm properties in armada, exynos, i2c/ch7006, novea
On Fri, 28 Feb 2014, Jani Nikula wrote:
> I'm keeping Akash's patch in -fixes for now as I've already pushed it
> there. Frankly, I'm inclined to queuing that one for 3.14 and fixing
> this right for 3.15, as it's a broken BIOS we're talking about, but I
> could be convinced otherwise. Particularl
On Wed, 05 Mar 2014, Daniel Vetter wrote:
> On Wed, Mar 05, 2014 at 12:19:51PM -0800, Ben Widawsky wrote:
>> On Wed, Mar 05, 2014 at 07:24:37AM -0800, Ben Widawsky wrote:
>> > On Wed, Mar 05, 2014 at 11:13:12AM +0200, Jani Nikula wrote:
>> > > On Wed, 05 Mar 2014, Ben Widawsky wrote:
>> > > > The
On 2014.03.05 18:51:48 +0200, Ville Syrjälä wrote:
> > entries = (clock / 1000) * pixel_size;
> > *plane_prec_mult = (entries > 256) ?
>
> The threshold should also be reduced to 128 entries.
>
hmm, I'll double check if this is really required or not.
> > - DRAIN_LATENCY_PRECI
On Wed, 2014-03-05 at 15:39 -0800, Jesse Barnes wrote:
> On Thu, 06 Mar 2014 01:29:14 +0200
> Imre Deak wrote:
>
> > On Wed, 2014-03-05 at 14:48 -0800, Jesse Barnes wrote:
> > > This lets us return to userspace more quickly and should improve init
> > > and suspend/resume times as well, allowing
On Thu, 06 Mar 2014 01:29:14 +0200
Imre Deak wrote:
> On Wed, 2014-03-05 at 14:48 -0800, Jesse Barnes wrote:
> > This lets us return to userspace more quickly and should improve init
> > and suspend/resume times as well, allowing us to return to userspace
> > sooner.
>
> IMHO this is a good move
On Wed, 2014-03-05 at 14:48 -0800, Jesse Barnes wrote:
> This lets us return to userspace more quickly and should improve init
> and suspend/resume times as well, allowing us to return to userspace
> sooner.
IMHO this is a good move towards a full command queue based solution for
kms commands, whe
On Wed, Mar 05, 2014 at 02:38:50PM -0800, Ben Widawsky wrote:
> It wasn't completely fortuitous, I did check. I was lucky you think my
> check was satisfactory though. I agree it makes future code somewhat
> risky so maybe some improvement is needed to safeguard. I also have/had
> a patch to length
In the hotplug case, nothing was grabbing VDD, leading to some warnings.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_dp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 763f235..78c883e 100644
--- a/dr
This gets us out of our init code and out to userspace quite a bit
faster, but does open us up to some bugs given the state of our init
time locking.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_dma.c| 3 ++-
drivers/gpu/drm/i915/i915_drv.h| 1 +
drivers/gpu/drm/i915/intel_d
Reduces params in a few places and makes workqueueing the eDP caching work
easier.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_dp.c | 23 +--
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/
This lets us return to userspace more quickly and should improve init
and suspend/resume times as well, allowing us to return to userspace
sooner.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 4 +-
drivers/gpu/drm/i915/in
I'm worried about the locking in this... I've also commented out the
state checker, but that can be re-added as a check after any queued CRTC
changes as another queued item, so should be easy to fix.
This set drastically improves the init time of the i915 module (based on
initcall_debug timing),
Drivers ought to complain otherwise.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/drm_fb_helper.c | 2 ++
drivers/gpu/drm/i915/intel_dp.c | 4
drivers/gpu/drm/i915/intel_drv.h | 3 +++
3 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_
It takes awhile to fetch the DPCD and EDID for caching, so take it out
of the critical path to improve init time.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_dp.c | 113 +---
1 file changed, 82 insertions(+), 31 deletions(-)
diff --git a/driver
On Wed, Mar 05, 2014 at 10:30:21PM +, Chris Wilson wrote:
> On Wed, Mar 05, 2014 at 11:05:15AM -0800, Ben Widawsky wrote:
> > On Wed, Mar 05, 2014 at 07:33:11PM +0100, Daniel Vetter wrote:
> > > On Wed, Mar 05, 2014 at 09:24:34AM +, Chris Wilson wrote:
> > > > On Tue, Mar 04, 2014 at 09:38:
On Wed, Mar 05, 2014 at 11:05:15AM -0800, Ben Widawsky wrote:
> On Wed, Mar 05, 2014 at 07:33:11PM +0100, Daniel Vetter wrote:
> > On Wed, Mar 05, 2014 at 09:24:34AM +, Chris Wilson wrote:
> > > On Tue, Mar 04, 2014 at 09:38:56AM -0800, Ben Widawsky wrote:
> > > > The actual post sync op is "Wr
On Wed, 5 Mar 2014 19:34:45 +0100
Daniel Vetter wrote:
> On Wed, Mar 05, 2014 at 08:27:08AM -0800, Jesse Barnes wrote:
> > On Tue, 4 Mar 2014 22:08:12 +0100
> > Daniel Vetter wrote:
> >
> > > On Tue, Mar 04, 2014 at 12:33:01PM -0800, Jesse Barnes wrote:
> > > > On Tue, 4 Mar 2014 21:08:42 +010
On Wed, Mar 05, 2014 at 12:00:18PM +0100, Daniel Vetter wrote:
> On Fri, Feb 21, 2014 at 04:06:47PM -0300, Paulo Zanoni wrote:
> > 2014-02-20 21:01 GMT-03:00 Ben Widawsky :
> > > This got lost when we shuffled around our internal branch and
> > > GEN7_FEATURES macro. There were no HW changes to sup
On Wed, Mar 5, 2014 at 10:00 PM, Daniel Vetter wrote:
> On Wed, Mar 5, 2014 at 9:32 PM, Andrew Morton
> wrote:
>> On Wed, 5 Mar 2014 10:33:14 +0100 Daniel Vetter
>> wrote:
>>
>>> Users just love to set random piles of options since surely enabling
>>> all the experimental stuff helps. Later o
On Wed, Mar 5, 2014 at 9:32 PM, Andrew Morton wrote:
> On Wed, 5 Mar 2014 10:33:14 +0100 Daniel Vetter
> wrote:
>
>> Users just love to set random piles of options since surely enabling
>> all the experimental stuff helps. Later on we get bug reports because
>> it all fell apart.
>>
>> Even mor
On Wed, 5 Mar 2014 10:33:14 +0100 Daniel Vetter wrote:
> Users just love to set random piles of options since surely enabling
> all the experimental stuff helps. Later on we get bug reports because
> it all fell apart.
>
> Even more fun when it's labelled a regression when some change only
> ju
On Wed, Mar 05, 2014 at 12:19:51PM -0800, Ben Widawsky wrote:
> On Wed, Mar 05, 2014 at 07:24:37AM -0800, Ben Widawsky wrote:
> > On Wed, Mar 05, 2014 at 11:13:12AM +0200, Jani Nikula wrote:
> > > On Wed, 05 Mar 2014, Ben Widawsky wrote:
> > > > The PDE needs to wrap after writing all the PTEs. Qu
On Wed, Mar 05, 2014 at 07:24:37AM -0800, Ben Widawsky wrote:
> On Wed, Mar 05, 2014 at 11:13:12AM +0200, Jani Nikula wrote:
> > On Wed, 05 Mar 2014, Ben Widawsky wrote:
> > > The PDE needs to wrap after writing all the PTEs. Quite a small/silly
> > > bug to find in the massive change. It was intr
On 05/03/2014 20:24, Gupta, Sourab wrote:
We have assumed the following lifecycle of the (stolen)object, w.r.t the
truncation usecase:
1) The user creates the (non-cpu mappable)object --> the gem object is created.
Shmem filep is allocated. No backing storage present
2) GPU operations performe
On Wed, Mar 05, 2014 at 10:12:55AM -0800, Ben Widawsky wrote:
> On Wed, Mar 05, 2014 at 06:08:19PM +0200, Mika Kuoppala wrote:
> > There should not be a case where fifo count is other
> > than zero after a successful reset. Always set
> > count to zero, but be paranoid enough to warn.
> >
> > v2:
Hi Chris,
We have assumed the following lifecycle of the (stolen)object, w.r.t the
truncation usecase:
1) The user creates the (non-cpu mappable)object --> the gem object is created.
Shmem filep is allocated. No backing storage present
2) GPU operations performed (after mmap_gtt ) --> object is
On Wed, Mar 05, 2014 at 07:33:11PM +0100, Daniel Vetter wrote:
> On Wed, Mar 05, 2014 at 09:24:34AM +, Chris Wilson wrote:
> > On Tue, Mar 04, 2014 at 09:38:56AM -0800, Ben Widawsky wrote:
> > > The actual post sync op is "Write Immediate Data QWord." It is therefore
> > > arguable that we shou
This needs to be useremail, not username here.
Signed-off-by: Damien Lespiau
---
qf | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/qf b/qf
index 742e704..057ae08 100755
--- a/qf
+++ b/qf
@@ -298,8 +298,8 @@ case "$1" in
username=${username+`git config use
A ':' was missing (should have been ':+'), but I think we want ':-', not
':+' ie we want to substitute if the parameter is undefined or empty:
http://www.gnu.org/software/bash/manual/bash.html#Shell-Parameter-Expansion
Signed-off-by: Damien Lespiau
---
qf | 8
1 file changed, 4 inser
On Wed, Mar 05, 2014 at 07:20:51PM +0100, Daniel Vetter wrote:
> On Mon, Mar 03, 2014 at 04:15:28PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Currently we allow encoders to indicate whether they can be part of a
> > cloned set with just one flag. That's not flexi
On Wed, Mar 05, 2014 at 07:21:58PM +0100, Daniel Vetter wrote:
> On Mon, Mar 03, 2014 at 04:15:31PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > BSpec is a bit unclear whether HDMI+HDMI cloning should work on g4x.
> > Tests on real hardware say that it does. Since g
On Wed, Mar 05, 2014 at 02:40:58PM +, Damien Lespiau wrote:
> On Wed, Mar 05, 2014 at 01:05:47PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > We have two names for the same register CHICKEN_PIPESL_1 and
> > HSW_PIPE_SLICE_CHICKEN_1. Unify it to just one.
> >
>
On Wed, Mar 05, 2014 at 08:27:08AM -0800, Jesse Barnes wrote:
> On Tue, 4 Mar 2014 22:08:12 +0100
> Daniel Vetter wrote:
>
> > On Tue, Mar 04, 2014 at 12:33:01PM -0800, Jesse Barnes wrote:
> > > On Tue, 4 Mar 2014 21:08:42 +0100
> > > Daniel Vetter wrote:
> > >
> > > > Both Ville and QA rather
On Wed, Mar 05, 2014 at 09:24:34AM +, Chris Wilson wrote:
> On Tue, Mar 04, 2014 at 09:38:56AM -0800, Ben Widawsky wrote:
> > The actual post sync op is "Write Immediate Data QWord." It is therefore
> > arguable that we should have always done a qword write.
>
> Not really since the spec expli
On Mon, Mar 03, 2014 at 04:15:31PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> BSpec is a bit unclear whether HDMI+HDMI cloning should work on g4x.
> Tests on real hardware say that it does. Since g4x can't send
> infoframes to more than one HDMI port anyway, we don't lo
On Mon, Mar 03, 2014 at 04:15:28PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Currently we allow encoders to indicate whether they can be part of a
> cloned set with just one flag. That's not flexible enough to describe
> the actual hardware capabilities. Instead make i
On Mon, Mar 03, 2014 at 04:36:11PM +0200, Jani Nikula wrote:
> On Mon, 03 Mar 2014, Daniel Vetter wrote:
> > ... it's this time of the year again. Originally we've frobbed this to
> > fix up some regressions, but maybe our DP code improved sufficiently
> > now that we can dare to do again what the
On Wed, Mar 05, 2014 at 09:59:55AM -0800, Ben Widawsky wrote:
> On Wed, Mar 05, 2014 at 06:08:18PM +0200, Mika Kuoppala wrote:
> > As we now have intel_uncore_forcewake_reset() no need
> > to do explicit put after reset.
> >
> > v2: rebase
> >
> > Signed-off-by: Mika Kuoppala
> > ---
> > driver
On Wed, Mar 05, 2014 at 06:08:19PM +0200, Mika Kuoppala wrote:
> There should not be a case where fifo count is other
> than zero after a successful reset. Always set
> count to zero, but be paranoid enough to warn.
>
> v2: rebased
>
> Suggested-by: Ben Widawsky
> Signed-off-by: Mika Kuoppala
>
On Mon, Mar 03, 2014 at 05:42:38PM +, Damien Lespiau wrote:
> This function was removed by Imre's power well work.
>
> Signed-off-by: Damien Lespiau
First two merged, this one here seems to no longer be required.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_drv.h | 1 -
> 1 file changed, 1 d
On Wed, Mar 05, 2014 at 06:08:18PM +0200, Mika Kuoppala wrote:
> As we now have intel_uncore_forcewake_reset() no need
> to do explicit put after reset.
>
> v2: rebase
>
> Signed-off-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 19 ---
> 1 file changed, 8 in
On Tue, Mar 04, 2014 at 08:17:36AM +, Chris Wilson wrote:
> On Tue, Mar 04, 2014 at 12:42:44AM +0100, Patrik Jakobsson wrote:
> > This patch fixes the blank screen bug introduced in 3.14-rc1 on the
> > MacBook Air 6,2. The comments state that we need to force edp vdd so
> > lets put it back.
>
On Mon, Mar 03, 2014 at 09:16:38PM +, Chris Wilson wrote:
> On Mon, Mar 03, 2014 at 05:31:43PM +, Damien Lespiau wrote:
> > Follow up of:
> > http://lists.freedesktop.org/archives/intel-gfx/2014-February/040789.html
> >
> > With a couple of changes:
> >
> > - Fix up the poor style whe
On Mon, Mar 03, 2014 at 01:09:36PM -0300, Rodrigo Vivi wrote:
> On Sat, Mar 1, 2014 at 6:10 PM, Chris Wilson wrote:
> > On Sat, Mar 01, 2014 at 03:29:41PM -0300, Rodrigo Vivi wrote:
> >> On Sat, Mar 1, 2014 at 5:45 AM, Chris Wilson
> >> wrote:
> >> > On Fri, Feb 28, 2014 at 08:44:45PM -0300, Rod
On Wed, Mar 05, 2014 at 06:43:03PM +0100, Daniel Vetter wrote:
> On Mon, Mar 03, 2014 at 07:19:19AM +, Chris Wilson wrote:
> > On Sun, Mar 02, 2014 at 03:58:09PM -0800, Ben Widawsky wrote:
> > > On Fri, Feb 28, 2014 at 08:06:50PM +, Chris Wilson wrote:
> > > > ctx->obj = i915_gem_ob
On Wed, Mar 05, 2014 at 09:14:38AM -0800, Daniel Vetter wrote:
> On Wed, Mar 05, 2014 at 08:59:56AM -0800, Volkin, Bradley D wrote:
> > On Wed, Mar 05, 2014 at 02:46:35AM -0800, Daniel Vetter wrote:
> > > On Tue, Feb 18, 2014 at 10:15:44AM -0800, bradley.d.vol...@intel.com
> > > wrote:
> > > > Fro
On Mon, Mar 03, 2014 at 07:19:19AM +, Chris Wilson wrote:
> On Sun, Mar 02, 2014 at 03:58:09PM -0800, Ben Widawsky wrote:
> > On Fri, Feb 28, 2014 at 08:06:50PM +, Chris Wilson wrote:
> > > ctx->obj = i915_gem_object_create_stolen(dev,
> > > dev_priv->hw_context_size);
> >
On Wed, Mar 05, 2014 at 03:32:54PM +, Chris Wilson wrote:
> On Wed, Mar 05, 2014 at 04:17:17PM +0100, Daniel Vetter wrote:
> > On Fri, Feb 28, 2014 at 12:14:02PM +, Chris Wilson wrote:
> > > We have reports of heavy screen corruption if we try to use the stolen
> > > memory reserved by the
On Wed, 5 Mar 2014, Daniel Vetter wrote:
> > > Maybe I should say that I'm booting the box with
> > >
> > > [ 0.00] Kernel command line:
> > > BOOT_IMAGE=/boot/vmlinuz-3.14.0-rc5+ root=/dev/sdb2 ro
> > > root=/dev/sdb2 ignore_loglevel log_buf_len=10M resume=/dev/sdb1
> > > i915.i915_enable
On Wed, Mar 05, 2014 at 07:49:13AM -0800, Jesse Barnes wrote:
> On Wed, 5 Mar 2014 13:55:00 +0100
> Daniel Vetter wrote:
>
> > On Thu, Feb 20, 2014 at 08:50:59PM +, Chris Wilson wrote:
> > > On Thu, Feb 20, 2014 at 12:39:57PM -0800, Jesse Barnes wrote:
> > > > Useful for bug reports.
> > >
>
On Wed, Mar 05, 2014 at 06:06:40PM +0100, Borislav Petkov wrote:
> On Tue, Mar 04, 2014 at 02:45:09PM +0100, Borislav Petkov wrote:
> > On Mon, Mar 03, 2014 at 03:20:11PM +0100, Jiri Kosina wrote:
> > > I encountered this again with -rc5.
> > >
> > > If there is anything I can do to help debug thi
On Wed, Mar 05, 2014 at 08:59:56AM -0800, Volkin, Bradley D wrote:
> On Wed, Mar 05, 2014 at 02:46:35AM -0800, Daniel Vetter wrote:
> > On Tue, Feb 18, 2014 at 10:15:44AM -0800, bradley.d.vol...@intel.com wrote:
> > > From: Brad Volkin
> > > 3) Coherency. I've previously found a coherency issue on
On Thu, Feb 27, 2014 at 07:26:27PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> Hi
>
> This is the second time I send this series to the mailing list. Please read
> the
> first cover letter:
>http://lists.freedesktop.org/archives/intel-gfx/2013-December/037721.html
>
> What's new?
>
On Tue, Mar 04, 2014 at 02:45:09PM +0100, Borislav Petkov wrote:
> On Mon, Mar 03, 2014 at 03:20:11PM +0100, Jiri Kosina wrote:
> > I encountered this again with -rc5.
> >
> > If there is anything I can do to help debug this, please let me know.
>
> I have a similar issue where the screen blanks
On Fri, Feb 28, 2014 at 09:55:12AM -0800, Jesse Barnes wrote:
> On Fri, 28 Feb 2014 19:38:17 +0200
> Imre Deak wrote:
>
> > On Fri, 2014-02-28 at 09:13 -0800, Jesse Barnes wrote:
> > > On Thu, 27 Feb 2014 19:26:43 -0300
> > > Paulo Zanoni wrote:
> > >
> > > > From: Paulo Zanoni
> > > >
> > >
On Wed, Mar 05, 2014 at 02:46:35AM -0800, Daniel Vetter wrote:
> On Tue, Feb 18, 2014 at 10:15:44AM -0800, bradley.d.vol...@intel.com wrote:
> > From: Brad Volkin
> > 3) Coherency. I've previously found a coherency issue on VLV when reading
> > the
> >batch buffer from the CPU during execbuff
On Thu, Feb 27, 2014 at 07:26:34PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> To solve a chicken-and-egg problem. Currently when we get/put
> forcewake we also get/put runtime PM and this works fine because the
> runtime PM code doesn't need forcewake. But we're going to merge PC8
> and
On Fri, Feb 28, 2014 at 06:50:06AM +0800, Zhenyu Wang wrote:
> >From spec the drain latency precision multipler is either 32 or 64 for VLV.
>
> Signed-off-by: Zhenyu Wang
> ---
> drivers/gpu/drm/i915/i915_reg.h | 18 +-
> drivers/gpu/drm/i915/intel_pm.c | 12 ++--
> 2 fil
On Wed, Mar 05, 2014 at 06:32:06PM +0200, Imre Deak wrote:
> On Thu, 2014-02-27 at 19:47 -0800, Ben Widawsky wrote:
> > We normally clear the page tables as one of the first things during
> > initialization. They are however wired up (and potentially valid) before
> > we clear them.
>
> I might be
Not everyone has that git c alias defined.
Signed-off-by: Damien Lespiau
---
qf | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
mode change 100755 => 100644 qf
diff --git a/qf b/qf
old mode 100755
new mode 100644
index 41f18ba..742e704
--- a/qf
+++ b/qf
@@ -158,7 +158,7 @@ function branc
Signed-off-by: Damien Lespiau
---
qf | 0
1 file changed, 0 insertions(+), 0 deletions(-)
mode change 100644 => 100755 qf
diff --git a/qf b/qf
old mode 100644
new mode 100755
--
1.8.3.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http
On Thu, 2014-02-27 at 19:47 -0800, Ben Widawsky wrote:
> We normally clear the page tables as one of the first things during
> initialization. They are however wired up (and potentially valid) before
> we clear them.
I might be missing something, but afaics the page directories/tables are
not in u
On Tue, 4 Mar 2014 22:08:12 +0100
Daniel Vetter wrote:
> On Tue, Mar 04, 2014 at 12:33:01PM -0800, Jesse Barnes wrote:
> > On Tue, 4 Mar 2014 21:08:42 +0100
> > Daniel Vetter wrote:
> >
> > > Both Ville and QA rather immediately complained that with the new
> > > initial_config logic from Jess
Daniel Vetter writes:
> On Fri, Feb 21, 2014 at 05:32:03PM +0200, mika.kuopp...@intel.com wrote:
>> From: Mika Kuoppala
>>
>> As we now have intel_uncore_forcewake_reset() no need
>> to do explicit put after reset.
>>
>> Signed-off-by: Mika Kuoppala
>
> I've merged patches 2-4 from this serie
As we now have intel_uncore_forcewake_reset() no need
to do explicit put after reset.
v2: rebase
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_uncore.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b
There should not be a case where fifo count is other
than zero after a successful reset. Always set
count to zero, but be paranoid enough to warn.
v2: rebased
Suggested-by: Ben Widawsky
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_uncore.c |7 ---
1 file changed, 4 inser
On Wed, 5 Mar 2014 13:55:00 +0100
Daniel Vetter wrote:
> On Thu, Feb 20, 2014 at 08:50:59PM +, Chris Wilson wrote:
> > On Thu, Feb 20, 2014 at 12:39:57PM -0800, Jesse Barnes wrote:
> > > Useful for bug reports.
> >
> > Hey, this would be useful for error state as well :)
>
> I seem to have
On Wed, Mar 05, 2014 at 04:17:17PM +0100, Daniel Vetter wrote:
> On Fri, Feb 28, 2014 at 12:14:02PM +, Chris Wilson wrote:
> > We have reports of heavy screen corruption if we try to use the stolen
> > memory reserved by the BIOS whilst the DMA-Remapper is active. This
> > quirk may be only spe
On Thu, Feb 27, 2014 at 03:10:50PM -0800, Ben Widawsky wrote:
> On Thu, Feb 27, 2014 at 09:59:03PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
> > 1 file changed, 1 insertion
On Wed, Mar 05, 2014 at 11:13:12AM +0200, Jani Nikula wrote:
> On Wed, 05 Mar 2014, Ben Widawsky wrote:
> > The PDE needs to wrap after writing all the PTEs. Quite a small/silly
> > bug to find in the massive change. It was introduced:
> > commit 307dc4f99f6d3a74a78b0e776838f35b2004f14d
> > Author
On Fri, Feb 28, 2014 at 12:14:02PM +, Chris Wilson wrote:
> We have reports of heavy screen corruption if we try to use the stolen
> memory reserved by the BIOS whilst the DMA-Remapper is active. This
> quirk may be only specific to a few machines or BIOSes, but first lets
> apply the big hamme
On Mon, Mar 03, 2014 at 11:56:08AM +0200, Ville Syrjälä wrote:
> On Fri, Feb 28, 2014 at 06:40:22PM -0300, Paulo Zanoni wrote:
> > Hi
> >
> > 2014-02-27 9:23 GMT-03:00 :
> > > From: Ville Syrjälä
> > >
> > > Write some theoretical SPLL sharing support for DDI. Currently that will
> > > never hap
On Sat, Mar 01, 2014 at 07:34:12AM +, Chris Wilson wrote:
> On Fri, Feb 28, 2014 at 07:28:41PM -0300, Paulo Zanoni wrote:
> > 2014-02-27 9:23 GMT-03:00 :
> > > From: Ville Syrjälä
> > >
> > > We normally use 10Khz units when describing DP link frequency.
> > > Have intel_fdi_link_freq() retur
On Fri, Feb 21, 2014 at 05:32:03PM +0200, mika.kuopp...@intel.com wrote:
> From: Mika Kuoppala
>
> As we now have intel_uncore_forcewake_reset() no need
> to do explicit put after reset.
>
> Signed-off-by: Mika Kuoppala
I've merged patches 2-4 from this series now too (patch 1 is already
merge
On Wed, Mar 05, 2014 at 02:17:28PM +0200, Jani Nikula wrote:
> BDW is no longer flagged as preliminary hw, but without
> i915.preliminary_hw_support module param set the logs are filled with
> WARNs about it.
>
> Just make semaphores off the BDW per-chip default for now.
>
> CC: Ben Widawsky
> R
On Thu, Feb 27, 2014 at 04:05:04PM -0800, Ben Widawsky wrote:
> On Thu, Feb 27, 2014 at 10:43:24AM +0200, Ville Syrjälä wrote:
> > On Wed, Feb 26, 2014 at 11:59:30PM -0800, Kenneth Graunke wrote:
> > > I believe this will be necessary on production hardware.
> > >
> > > Signed-off-by: Kenneth Grau
On Wed, Feb 26, 2014 at 04:17:43PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> A set of userptr test cases to support the new feature.
>
> For the eviction and swapping stress testing I have extracted
> some common behaviour from gem_evict_everything and made both
> test cases use it
On Wed, Mar 05, 2014 at 01:05:47PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> We have two names for the same register CHICKEN_PIPESL_1 and
> HSW_PIPE_SLICE_CHICKEN_1. Unify it to just one.
>
> Also rename the FBCQ disable bit to resemble the name we've
> given to a sim
On Wed, Mar 05, 2014 at 01:05:46PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> gen7_enable_fbc() may write to some registers which we've already
> touched, so use RMW so that we don't undo any previous updates.
>
> Also note that we implemnt WaFbcAsynchFlipDisableFbcQue
On Tue, Feb 25, 2014 at 11:36:15PM -0800, Ben Widawsky wrote:
> On Tue, Feb 25, 2014 at 11:27:15PM -0800, Ben Widawsky wrote:
> > On Tue, Feb 25, 2014 at 06:13:44PM -0800, Ben Widawsky wrote:
> > > This patch converts insert_entries and clear_range, both functions which
> > > are specific to the VM
We can read out the pipe HW state only if the required power domain is
on. If not we consider the pipe to be off.
v2:
- no change
v3:
- push down the power domain checks into the specific crtc
get_pipe_config handlers (Daniel)
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_display.c
Since the encoder is tied to its port, we need to make sure the power
domain for that port is on before reading out the encoder HW state.
Note that this also covers also all connector get_hw_state handlers,
since all those just call the corresponding encoder get_hw_state
handler, which checks - af
These functions will be needed by the valleyview specific power well
update functionality added in an upcoming patch, so move them earlier.
No functional change.
v2:
- no change
v3:
- rebase on latest -nightly
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_display.c | 140
Based on an early draft from Jesse.
Add support for powering on/off the dynamic power wells on VLV by
registering its display and dpio dynamic power wells with the power
domain framework.
For now power on all PHY TX lanes regardless of the actual lane
configuration. Later this can be optimized wh
The connector detect and get_mode handlers need to access the port
specific HW blocks to read the EDID etc. Get/put the port power domains
around these handlers.
v2:
- get port power domain for HDMI too (Ville)
- get port power domain for the DP,HDMI audio detect handlers (Jesse)
- Leave the intel
On Wed, Mar 05, 2014 at 01:05:29PM +, Chris Wilson wrote:
> On Tue, Feb 25, 2014 at 03:38:18PM -0800, Ben Widawsky wrote:
> > On Tue, Feb 25, 2014 at 02:23:28PM +, Chris Wilson wrote:
> > > In place of true activity counting, we walk the list of vma associated
> > > with an object managing
On Mon, Feb 24, 2014 at 07:50:49PM +, Rob Bradford wrote:
> From: Rob Bradford
>
> The LLC check echoes the check made by i915_gem_fault() which will
> handle the mapping the pages through the GTT.
>
> The aim is that this is functionally equivalent to using the
> I915_GEM_MMAP_GTT ioctl and
On Mon, Feb 24, 2014 at 05:48:16PM +0200, Ville Syrjälä wrote:
> On Mon, Feb 24, 2014 at 09:07:05PM +0530, sagar.a.kam...@intel.com wrote:
> > From: Sagar Kamble
> >
> > Signed-off-by: Sagar Kamble
> > ---
> > tests/kms_cursor_crc.c | 51
> > ++
>
On Fri, Feb 28, 2014 at 04:51:16PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 28, 2014 at 07:56:56PM +0530, S, Deepak wrote:
> >
> >
> > On 2/28/2014 1:37 AM, ville.syrj...@linux.intel.com wrote:
> > > From: Ville Syrjälä
> > >
> > > It occured to me that when we're trying to wake up both render
On Mon, Feb 24, 2014 at 05:02:08PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Use the render/media specific forcewake counts to properly restore the
> forcewake status after a GPU reset on VLV.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_uncor
On Mon, Feb 24, 2014 at 06:37:35PM -0800, Ben Widawsky wrote:
> On Mon, Feb 24, 2014 at 11:56:59AM +, joao.san...@intel.com wrote:
> > From: Joao Santos
> >
> > Making libdrm and kernel drm uniform. The lack of this macro makes igt test
> > build break.
> >
> > Change-Id: Ie62a2507e48eb3927b
On Wed, Mar 05, 2014 at 02:38:25PM +0200, Ville Syrjälä wrote:
> On Tue, Mar 04, 2014 at 10:24:54AM +0100, Daniel Vetter wrote:
> > On Fri, Feb 21, 2014 at 09:03:33PM +0200, ville.syrj...@linux.intel.com
> > wrote:
> > > From: Ville Syrjälä
> > >
> > > Allow the driver to specify whether all new
On Wed, Feb 26, 2014 at 04:22:15PM +, Tvrtko Ursulin wrote:
> On 02/21/2014 06:45 PM, Chris Wilson wrote:
> [snip]
> >v20: Refuse to implement read-only support until we have the required
> > infrastructure - but reserve the bit in flags for future use.
> >
> >Signed-off-by: Chris Wilson
On Wed, Mar 05, 2014 at 02:34:48PM +0100, Daniel Vetter wrote:
> On Wed, Mar 05, 2014 at 01:08:15PM +, Chris Wilson wrote:
> > On Wed, Feb 12, 2014 at 11:32:00AM -0800, Ben Widawsky wrote:
> > > On Wed, Feb 12, 2014 at 07:18:19PM +, Chris Wilson wrote:
> > > > On Wed, Feb 12, 2014 at 10:55:
On Wed, Mar 05, 2014 at 02:44:18PM +0100, Daniel Vetter wrote:
> On Fri, Feb 28, 2014 at 05:16:12PM +0200, Imre Deak wrote:
> > On Fri, 2014-02-21 at 13:52 -0300, Paulo Zanoni wrote:
> > > From: Paulo Zanoni
> > >
> > > I could swear this was already happening in the current code...
> > >
> > >
On Wed, Mar 05, 2014 at 03:08:27PM +0200, Ville Syrjälä wrote:
> On Thu, Feb 20, 2014 at 09:26:13AM +, Chris Wilson wrote:
> > After a hang and failed reset, we cannot use the GPU to execute the page
> > flip instructions. Instead we can force a synchronous mmio flip. (Later,
> > we can reduce
On Fri, Feb 28, 2014 at 05:16:12PM +0200, Imre Deak wrote:
> On Fri, 2014-02-21 at 13:52 -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni
> >
> > I could swear this was already happening in the current code...
> >
> > Also, put the reads and writes in a generic place, so we don't forget
> > it
On Fri, Feb 21, 2014 at 01:52:27PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> Because gen6_gt_force_wake_{get,put} should already be responsible for
> getting/putting runtime PM.
>
> Signed-off-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 2 --
> 1 file changed, 2 de
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