From: Sonika Jindal sonika.jin...@intel.com
As suggested by Daniel, now calling intel_primary_plane_setplane in
set_property.
Inside setplane, the intel_plane's member variables were not updated in the
structure. The first patch does that updation.
From kms_rotation_crc igt, drmModeSetCrtc was
From: Sonika Jindal sonika.jin...@intel.com
Signed-off-by: Sonika Jindal sonika.jin...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
From: Sonika Jindal sonika.jin...@intel.com
Primary planes support 180 degree rotation. Expose the feature
through rotation drm property.
v2: Calculating linear/tiled offsets based on pipe source width and
height. Added 180 degree rotation support in ironlake_update_plane.
v3: Checking if CRTC
From: Sonika Jindal sonika.jin...@intel.com
Since planes are universal now, using commit2 so that drmModeSetPlane can be
called for primary plane as well instead of drmModeSetCrtc. drmModeSetPlane will
update the x,y,w,h for the plane.
Cc: Damien Lespiau damien.lesp...@intel.com
Signed-off-by:
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Passing the port as a parameter to PANEL_PORT_SELECT_VLV results in
neater code. Sadly the PCH port select bits aren't suitable for the
same treatment and the resulting macro would be
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Move the vlv_power_sequencer_pipe() after the IS_VALLEYVIEW() check
and flatten the rest of the function.
Please imagine adding another platform there, and realize this just adds
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Add a comment to explain why we care about the current want_panel_vdd
state in intel_dp_aux_ch().
Reviewed-by: Jani Nikula jani.nik...@intel.com
Signed-off-by: Ville Syrjälä
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
We want to use the higher level vdd on func here. Not a big deal
yet (we'd just get the warn when things go awry) but when the
locking gets fixed this becomes more important.
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
edp_* are now the lower level functions and intel_edp_* the higher level
ones. One should use them in pairs.
Yeah I should've done this when I added the lower level ones. One thing
you
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Less pointless indentation is always nice. There will be a bit more
code in this function once the power sequencer locking is fixed.
Reviewed-by: Jani Nikula jani.nik...@intel.com
This
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Looks nicer.
Side note, I kind of like adding No functional changes. in the commit
messages of patches that do not intend to do functional changes. I find
it helpful.
Reviewed-by: Jani
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
On VLV/CHV the panel power sequencer may need to be kicked a bit to
lock onto the new port, and that needs to happen before any aux
transfers are attempted if we want the aux transfers
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
If we force vdd off warn if someone is still using it. With this
change the delayed vdd off work needs to check want_panel_vdd
itself to make sure it doesn't try to turn vdd off when
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
While wrestling with the VLV/CHV panel power sequencer I noticed the locking
in our edp vdd code was rather broken. This series aims to fix that by
introducing a power seqeuencer mutex.
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
While wrestling with the VLV/CHV panel power sequencer I noticed the locking
in our edp vdd code was rather broken. This series aims to fix that by
introducing a power seqeuencer mutex.
Hi,
Did anybody get a chance to review other patches in this series?
I got r-b for 2 patches (patches with changes in drm and i915) from Damien.
Thanks,
Sonika
-Original Message-
From: Jindal, Sonika
Sent: Friday, August 8, 2014 4:24 PM
To: intel-gfx@lists.freedesktop.org
Cc:
Unfortunately, the gem_obj/vma relationship is not symmetrical; a gem_obj
can look up for the same vma more than once (where the ppgtt refcount is
incremented), but will free the vma only once (i915_gem_free_object).
This difference in refcount get/put means that the ppgtt is not removed
after
On Tue, Aug 19, 2014 at 10:13:36AM +0100, Thomas Daniel wrote:
A previous commit broke aliasing PPGTT for lrc, resulting in a kernel oops
on boot. Add a check so that is full PPGTT is not in use the context is
populated with the aliasing PPGTT.
Usually, we add a bit of history to the patch
On Sun, 17 Aug 2014, Bertrik Sikken bert...@sikken.nl wrote:
On 15-8-2014 3:43, Jani Nikula wrote:
On Thu, 14 Aug 2014, Bertrik Sikken bert...@sikken.nl wrote:
Attached is dmesg output from booting kernel 3.14-2 (debian unstable)
with drm.debug=0xe and the samsung_laptop module enabled, from
Hi Mika,
can you please review this patch, and verify it fixes the issues in your
previous review.
Thanks,
Alistair.
-Original Message-
From: Mcaulay, Alistair
Sent: Friday, August 15, 2014 6:52 PM
To: intel-gfx@lists.freedesktop.org
Cc: Mcaulay, Alistair
Subject: [PATCH v3]
From: Ville Syrjälä ville.syrj...@linux.intel.com
edp_* are now the lower level functions and intel_edp_* the higher level
ones. One should use them in pairs.
v2: Don't return void (Jani)
Reviewed-by: Jani Nikula jani.nik...@intel.com
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
On Tue, Aug 19, 2014 at 10:36:52AM +0300, Jani Nikula wrote:
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
If we force vdd off warn if someone is still using it. With this
change the delayed vdd off work needs to check
On 18 August 2014 18:43, Mike Mason michael.w.ma...@intel.com wrote:
gem_mmap seg faults when all tests are run together. This occurs because
the new-object subtest closes the gem object, but short-mmap assumes
it still exists. Thus gem_mmap__cpu() returns nil for addr and memset()
seg faults.
On Tue, Aug 19, 2014 at 11:08:33AM +0300, Jani Nikula wrote:
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
While wrestling with the VLV/CHV panel power sequencer I noticed the locking
in our edp vdd code was rather broken. This
On Tue, Aug 19, 2014 at 10:30:25AM +0300, Jani Nikula wrote:
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Less pointless indentation is always nice. There will be a bit more
code in this function once the power sequencer
On Tue, Aug 19, 2014 at 10:33:15AM +0300, Jani Nikula wrote:
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
On VLV/CHV the panel power sequencer may need to be kicked a bit to
lock onto the new port, and that needs to happen
Mcaulay, Alistair alistair.mcau...@intel.com writes:
Hi Mika,
can you please review this patch, and verify it fixes the issues in your
previous review.
Thanks,
Alistair.
-Original Message-
From: Mcaulay, Alistair
Sent: Friday, August 15, 2014 6:52 PM
To:
On Tue, 19 Aug 2014, Bertrik Sikken bert...@sikken.nl wrote:
On Sun, 17 Aug 2014, Bertrik Sikken bert...@sikken.nl wrote:
On 15-8-2014 3:43, Jani Nikula wrote:
On Thu, 14 Aug 2014, Bertrik Sikken bert...@sikken.nl wrote:
Attached is dmesg output from booting kernel 3.14-2 (debian unstable)
On Tue, 19 Aug 2014, Ville Syrjälä ville.syrj...@linux.intel.com wrote:
On Tue, Aug 19, 2014 at 10:36:52AM +0300, Jani Nikula wrote:
On Mon, 18 Aug 2014, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
If we force vdd off warn if someone is still
On Tue, Aug 19, 2014 at 10:50 AM, Michel Thierry
michel.thie...@intel.com wrote:
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2223,6 +2223,7 @@ static struct i915_vma *__i915_gem_vma_create(struct
drm_i915_gem_object *obj,
On Mon, Aug 18, 2014 at 4:55 PM, Paulo Zanoni przan...@gmail.com wrote:
2014-08-18 5:29 GMT-03:00 Jani Nikula jani.nik...@linux.intel.com:
On Fri, 15 Aug 2014, Damien Lespiau damien.lesp...@intel.com wrote:
We still have a few missing bits and pieces to have execlists enabled by
default eg.
On Tue, Aug 19, 2014 at 4:07 AM, Scot Doyle lkm...@scotdoyle.com wrote:
BIOS or firmware can modify hardware state during suspend/resume,
for example on the Toshiba CB35 or Lenovo T400, so log a debug message
instead of a warning if the backlight is unexpectedly enabled.
Bugzilla:
Ok, things start to dawn upon me - let's blame it on the lack of
decent coffee here ;-) I mixed up USES_PPGTT with USES_FULL_PPGTT
(again) so didn't realize that execlist works with just aliasing
ppgtt. So I guess there's still room to clean up these macros a bit,
maybe do an
Unfortunately, the gem_obj/vma relationship is not symmetrical; a gem_obj
can look up for the same vma more than once (where the ppgtt refcount is
incremented), but will free the vma only once (i915_gem_free_object).
This difference in refcount get/put means that the ppgtt is not removed
after
From: Ville Syrjälä ville.syrj...@linux.intel.com
Introduce a new mutex (pps_mutex) to protect the power sequencer
state. For now this state includes want_panel_vdd as well as the
power sequencer registers.
We need a single mutex (as opposed to per port) because later on we
will need to deal
From: Ville Syrjälä ville.syrj...@linux.intel.com
The power sequencer loses its state when the disp2d power well is down.
Clear the dev_priv-pps_pipe tracking so that the power sequencer state
gets reinitialized the next time it's needed.
Signed-off-by: Ville Syrjälä
From: Ville Syrjälä ville.syrj...@linux.intel.com
Jani wanted some comments to explain why we call certain vdd on/off
functions in certain places.
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
---
drivers/gpu/drm/i915/intel_dp.c | 16
1 file changed, 16
Ping.
On Thu, Aug 14, 2014 at 2:55 AM, Dushyant Behl myselfdushyantb...@gmail.com
wrote:
Hi Everyone,
I am an Operating system developer and I'm working on a project for
which I wanted to understand the working of Intel Graphics Driver.
Being somewhat new in this field, Can I ask anyone
Readding intel-gfx. Please don't drop mailing lists cc's without telling me.
Thanks, Daniel
On Tue, Aug 19, 2014 at 8:57 PM, Daniel Vetter dan...@ffwll.ch wrote:
Yeah, that does a lot too much flushing - you need to track relevant
dirty bits like psr does, and then only flush when there has
On Tue, Aug 19, 2014 at 11:29 AM, Dushyant Behl
myselfdushyantb...@gmail.com wrote:
Ping.
On Thu, Aug 14, 2014 at 2:55 AM, Dushyant Behl
myselfdushyantb...@gmail.com wrote:
Hi Everyone,
I am an Operating system developer and I'm working on a project for
which I wanted to understand the
On Tue, Aug 19, 2014 at 11:56:42AM +0530, sonika.jin...@intel.com wrote:
From: Sonika Jindal sonika.jin...@intel.com
Signed-off-by: Sonika Jindal sonika.jin...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 24
1 file changed, 24 insertions(+)
diff --git
From: Clint Taylor clinton.a.tay...@intel.com
Pixel replicated modes should be 720 horizontal pixel and pixel
replicated by the HW across the HDMI cable at 2X pixel clock. Current
horizontal resolution of 1440 does not allow pixel duplication to
occur and scaling artifacts occur on the TV. HDMI
Allen,
Could you reply this?
Let me summarized what we have discussed and learned so far:
1) Future Windows/Linux IGD drivers will be modified to restrain from accessing
MCH/PCH devices. We are prototyping this in Windows driver right now and will
pass the same methodology to Linux driver
Greetings - after reviewing Chris¹s feedback below and some thought, I
most likely do not need to add another trace message and the existing
³i915_flip_complete² trace message can be used.
Thus the only change requested is to have the T1_T3 value printed out
during driver init/re-init. Here is
On Tue, Aug 19, 2014 at 09:24:03PM +, Kay, Allen M wrote:
Allen,
Could you reply this?
Let me summarized what we have discussed and learned so far:
1) Future Windows/Linux IGD drivers will be modified to restrain from
accessing MCH/PCH devices. We are prototyping this in
-Original Message-
From: Michael S. Tsirkin [mailto:m...@redhat.com]
Sent: Tuesday, August 19, 2014 2:51 PM
To: Kay, Allen M
Cc: Chen, Tiejun; Paolo Bonzini; Wang, Yong Y; Don Dutile; Jesse Barnes;
Konrad Rzeszutek Wilk; qemu-de...@nongnu.org; xen-
de...@lists.xensource.com;
On Tue, Aug 19, 2014 at 11:56:43AM +0530, sonika.jin...@intel.com wrote:
From: Sonika Jindal sonika.jin...@intel.com
Primary planes support 180 degree rotation. Expose the feature
through rotation drm property.
v2: Calculating linear/tiled offsets based on pipe source width and
height.
On 08/12/2014 07:11 AM, Jani Nikula wrote:
Make it possible to change panel power control backlight state without
touching the PWM. No functional changes.
Signed-off-by: Jani Nikula jani.nik...@intel.com
---
drivers/gpu/drm/i915/intel_dp.c | 39 ++-
1 file
On 08/12/2014 07:11 AM, Jani Nikula wrote:
This lets the userspace switch off the backlight using the backlight
class sysfs bl_power file. The switch is done using the power sequencer;
the backlight PWM, and everything else, remains enabled. The display
backlight won't draw power, but for
On 08/13/2014 02:10 AM, Jani Nikula wrote:
Make backlight class sysfs bl_power a sub-state of backlight enabled, if
a backlight power connector callback is defined. It's up to the
connector callback to handle the sub-state, typically in a way that
respects panel power sequencing.
v2: Post the
On 08/12/2014 07:11 AM, Jani Nikula wrote:
Make backlight class sysfs brightness 0 value switch off the backlight
for connectors that have the backlight_power callback defined. For eDP,
this has the similar caveats regarding power savings as bl_power as only
the power sequencer backlight control
On 2014/8/20 5:51, Michael S. Tsirkin wrote:
On Tue, Aug 19, 2014 at 09:24:03PM +, Kay, Allen M wrote:
Allen,
Could you reply this?
Let me summarized what we have discussed and learned so far:
1) Future Windows/Linux IGD drivers will be modified to restrain from accessing
MCH/PCH
On 8/20/2014 4:21 AM, Matt Roper wrote:
On Tue, Aug 19, 2014 at 11:56:43AM +0530, sonika.jin...@intel.com wrote:
From: Sonika Jindal sonika.jin...@intel.com
Primary planes support 180 degree rotation. Expose the feature
through rotation drm property.
v2: Calculating linear/tiled offsets
On 8/20/2014 2:20 AM, Matt Roper wrote:
On Tue, Aug 19, 2014 at 11:56:42AM +0530, sonika.jin...@intel.com wrote:
From: Sonika Jindal sonika.jin...@intel.com
Signed-off-by: Sonika Jindal sonika.jin...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 24
1
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