On Mon, Nov 03, 2014 at 01:29:04PM +, Dave Gordon wrote:
Fixes to both the LRC and the legacy ringbuffer code to correctly
calculate and update the available space in a ring.
The logical ring code was updating the software ring 'head' value
by reading the hardware 'HEAD' register. In LRC
On Tue, Nov 18, 2014 at 07:44:40AM +, Chris Wilson wrote:
On Mon, Nov 17, 2014 at 08:04:09PM +0100, Daniel Vetter wrote:
On Mon, Nov 17, 2014 at 03:48:27PM +, Arun Siluvery wrote:
We are not freeing memory allocated for ringbuf and ctx if we fail
to map status page so release all
kmap never fails.
Spotted-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Chris Wilson ch...@chris-wilson.co.uk
Cc: Arun Siluvery arun.siluv...@linux.intel.com
Signed-off-by: Daniel Vetter daniel.vet...@intel.com
---
drivers/gpu/drm/i915/intel_lrc.c | 15 +++
1 file changed, 3
-Original Message-
From: Lespiau, Damien
Sent: Saturday, November 15, 2014 6:55 PM
To: He, Shuang
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 4/4] drm/i915/skl: Read out crtl1 for
eDP/DPLL0
Hi Shuang,
You wanted suggestions, so how about:
For both
On Mon, Nov 17, 2014 at 01:08:46PM -0800, Jesse Barnes wrote:
Just like we do in the HDMI code, set the infoframe flag if we detect an
HDMI sink.
Reported-by: Paulo Zanoni przan...@gmail.com
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_ddi.c | 1 +
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
Sent: Monday, November 17, 2014 11:03 PM
To: Lespiau, Damien
Cc: He, Shuang; intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 4/4] drm/i915/skl: Read out crtl1 for
On Mon, Nov 17, 2014 at 01:08:47PM -0800, Jesse Barnes wrote:
The lack of a break here wasn't for falling through to some other
important code, so made me do a double take. Add a break just to make
things a little less confusing.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
On Mon, Nov 17, 2014 at 07:28:28PM +0100, Daniel Vetter wrote:
On Fri, Nov 14, 2014 at 05:24:35PM +, Damien Lespiau wrote:
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/intel_ddi.c | 8
1 file changed, 8 insertions(+)
diff --git
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
-Summary-
Platform: baseline_drm_intel_nightly_pass_rate-patch_applied_pass_rate
BYT: pass/total=290/291-291/291
PNV:
On Tue, 18 Nov 2014, Matt Roper matthew.d.ro...@intel.com wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
We need to get hdisplay and vdisplay in a few places so create a
helper to make our job easier.
v2 (by Matt): Use new stereo doubling function (suggested by Ville)
Cc:
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
Vetter
Sent: Monday, November 17, 2014 6:09 PM
To: Daniel, Thomas
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v5 3/4] drm/i915/bdw: Pin the context
backing objects to
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
Of john.c.harri...@intel.com
Sent: Friday, November 14, 2014 12:19 PM
To: Intel-GFX@Lists.FreeDesktop.Org
Subject: [Intel-gfx] [PATCH v2 11/28] drm/i915: Add IRQ friendly request
deference
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
Of john.c.harri...@intel.com
Sent: Friday, November 14, 2014 12:19 PM
To: Intel-GFX@Lists.FreeDesktop.Org
Subject: [Intel-gfx] [PATCH v2 25/28] drm/i915: Interrupt driven request
completion
We should be able to execute batches up to the full GTT size (give or
take fragmentation), so let's try!
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
tests/gem_exec_big.c | 28 ++--
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git
Indicate the monitor has been disconnected on disable.
The regression has been introduced in
commit 5fad84a7530f8e7664cdc6f490cb90653fed1266
Author: Jani Nikula jani.nik...@intel.com
Date: Tue Nov 4 10:30:23 2014 +0200
drm/i915: rewrite hsw/bdw audio codec enable/disable sequences
On Tue, Nov 18, 2014 at 12:11:29PM +0200, Jani Nikula wrote:
Indicate the monitor has been disconnected on disable.
The regression has been introduced in
commit 5fad84a7530f8e7664cdc6f490cb90653fed1266
Author: Jani Nikula jani.nik...@intel.com
Date: Tue Nov 4 10:30:23 2014 +0200
On Tue, Nov 18, 2014 at 09:50:23AM +, Chris Wilson wrote:
We should be able to execute batches up to the full GTT size (give or
take fragmentation), so let's try!
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
tests/gem_exec_big.c | 28 ++--
1 file
On Tue, Nov 18, 2014 at 11:33:23AM +0100, Daniel Vetter wrote:
On Tue, Nov 18, 2014 at 09:50:23AM +, Chris Wilson wrote:
We should be able to execute batches up to the full GTT size (give or
take fragmentation), so let's try!
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
Of Daniel, Thomas
Sent: Tuesday, November 18, 2014 9:28 AM
To: Daniel Vetter
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v5 3/4] drm/i915/bdw: Pin the context
This goes back to
commit 362b8af7ad1d91266aa4931e62be45c1e5cf753b
Author: Ben Widawsky benjamin.widaw...@intel.com
Date: Thu Jan 30 00:19:38 2014 -0800
drm/i915: Move per ring error state to ring_error
Spotted while reading error states.
Cc: Ben Widawsky benjamin.widaw...@intel.com
Cc:
drm_open_any keeps a buffer handle around for the cleanup sync work,
so we can only grab the buffer count after the latst drm_open_any
call. Otherwise we'll detect a fake leak.
This broke in
commit 2f2c491cf3167befe7c79e4b17afb4f6284dfc84
Author: Mika Kuoppala mika.kuopp...@intel.com
Date: Fri
Let's just throw in the towel on this one and take the cheap way out.
Based on a patch from Chris Wilson, but checking for a different bit.
Chris' patch checked for even bank layout, this one here for a magic
bit. Given the evidence we've gathered (not much) both work I think,
but checking for
The only thing the kernel can do is pin the buffers, which essentially
means no swapped tiled objects.
Signed-off-by: Daniel Vetter daniel.vet...@intel.com
---
tests/gem_tiled_swapping.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/tests/gem_tiled_swapping.c
On Tue, Nov 18, 2014 at 02:41:22PM +0100, Daniel Vetter wrote:
struct intel_fbdev;
struct intel_fbc_work;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 1de94cc63517..196ebd07d118 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++
On Tue, Nov 18, 2014 at 01:28:38PM +0100, Daniel Vetter wrote:
This goes back to
commit 362b8af7ad1d91266aa4931e62be45c1e5cf753b
Author: Ben Widawsky benjamin.widaw...@intel.com
Date: Thu Jan 30 00:19:38 2014 -0800
drm/i915: Move per ring error state to ring_error
Spotted while
On Tue, Nov 18, 2014 at 02:40:28PM +0100, Daniel Vetter wrote:
The only thing the kernel can do is pin the buffers, which essentially
means no swapped tiled objects.
Signed-off-by: Daniel Vetter daniel.vet...@intel.com
---
tests/gem_tiled_swapping.c | 22 ++
1 file
On Tue, Nov 18, 2014 at 10:48:09AM +, Daniel, Thomas wrote:
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
Of Daniel, Thomas
Sent: Tuesday, November 18, 2014 9:28 AM
To: Daniel Vetter
Cc: intel-gfx@lists.freedesktop.org
On Tue, Nov 18, 2014 at 02:04:23PM +, Chris Wilson wrote:
On Tue, Nov 18, 2014 at 01:28:38PM +0100, Daniel Vetter wrote:
This goes back to
commit 362b8af7ad1d91266aa4931e62be45c1e5cf753b
Author: Ben Widawsky benjamin.widaw...@intel.com
Date: Thu Jan 30 00:19:38 2014 -0800
On Tue, Nov 18, 2014 at 02:06:37PM +, Chris Wilson wrote:
On Tue, Nov 18, 2014 at 02:40:28PM +0100, Daniel Vetter wrote:
The only thing the kernel can do is pin the buffers, which essentially
means no swapped tiled objects.
Signed-off-by: Daniel Vetter daniel.vet...@intel.com
---
On Tue, Nov 18, 2014 at 02:01:37PM +, Chris Wilson wrote:
On Tue, Nov 18, 2014 at 02:41:22PM +0100, Daniel Vetter wrote:
struct intel_fbdev;
struct intel_fbc_work;
diff --git a/drivers/gpu/drm/i915/i915_gem.c
b/drivers/gpu/drm/i915/i915_gem.c
index 1de94cc63517..196ebd07d118
So skip those.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86236
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
tests/kms_render.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/tests/kms_render.c b/tests/kms_render.c
index
On Tue, Nov 18, 2014 at 03:35:33PM +0100, Daniel Vetter wrote:
On Tue, Nov 18, 2014 at 02:06:37PM +, Chris Wilson wrote:
On Tue, Nov 18, 2014 at 02:40:28PM +0100, Daniel Vetter wrote:
The only thing the kernel can do is pin the buffers, which essentially
means no swapped tiled
On Tue, Nov 18, 2014 at 03:34:15PM +0100, Daniel Vetter wrote:
On Tue, Nov 18, 2014 at 02:04:23PM +, Chris Wilson wrote:
On Tue, Nov 18, 2014 at 01:28:38PM +0100, Daniel Vetter wrote:
This goes back to
commit 362b8af7ad1d91266aa4931e62be45c1e5cf753b
Author: Ben Widawsky
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
Vetter
Sent: Tuesday, November 18, 2014 2:33 PM
To: Daniel, Thomas
Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v5 3/4] drm/i915/bdw: Pin the context
From: Tim Gore tim.g...@intel.com
kms_pwrite_crc was recently added and requires cairo, so
add this to the list of tests to exclude if cairo is not
avaiable
Signed-off-by: Tim Gore tim.g...@intel.com
---
tests/Android.mk | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Tim Gore tim.g...@intel.com
gem_fence_upload implements some performance measurements,
but fails on both android and linux systems and does not
generally seem to be a usefull test, so exclude it.
Signed-off-by: Tim Gore tim.g...@intel.com
---
tests/Android.mk | 3 +++
1 file changed, 3
On Tue, Nov 18, 2014 at 02:51:52PM +, Daniel, Thomas wrote:
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
Vetter
Sent: Tuesday, November 18, 2014 2:33 PM
To: Daniel, Thomas
Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org
On Tue, Nov 18, 2014 at 03:03:28PM +, tim.g...@intel.com wrote:
From: Tim Gore tim.g...@intel.com
gem_fence_upload implements some performance measurements,
but fails on both android and linux systems and does not
generally seem to be a usefull test, so exclude it.
Signed-off-by: Tim
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
-Summary-
Platform: baseline_drm_intel_nightly_pass_rate-patch_applied_pass_rate
BYT: pass/total=290/290-290/290
PNV:
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
Vetter
Sent: Tuesday, November 18, 2014 3:11 PM
To: Daniel, Thomas
Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v5 3/4] drm/i915/bdw: Pin the context
2014-11-05 16:48 GMT-02:00 Imre Deak imre.d...@intel.com:
While fixing [1] I noticed that we can simplify a couple of things in
the RPS enabling/disabling code. So I did that and also fixed one WARN
that we can hit with some of the pm_rpm subtests. Hopefully these
changes also makes it clearer
On Tue, 2014-11-18 at 14:04 -0200, Paulo Zanoni wrote:
2014-11-05 16:48 GMT-02:00 Imre Deak imre.d...@intel.com:
While fixing [1] I noticed that we can simplify a couple of things in
the RPS enabling/disabling code. So I did that and also fixed one WARN
that we can hit with some of the
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
-Summary-
Platform: baseline_drm_intel_nightly_pass_rate-patch_applied_pass_rate
BYT: pass/total=290/290-290/290
PNV:
On Tue, 18 Nov 2014 09:14:05 +0100
Daniel Vetter dan...@ffwll.ch wrote:
On Mon, Nov 17, 2014 at 01:08:46PM -0800, Jesse Barnes wrote:
Just like we do in the HDMI code, set the infoframe flag if we detect an
HDMI sink.
Reported-by: Paulo Zanoni przan...@gmail.com
Signed-off-by: Jesse
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
We need to get hdisplay and vdisplay in a few places so create a
helper to make our job easier.
v2 (by Matt): Use new stereo doubling function (suggested by Ville)
v3 (by Matt):
- Add missing kerneldoc (Daniel)
- Use drm_mode_copy() (Jani)
Jani/Jesse,
Does this patch look reasonable to you for merging?
-- U. Artie
-Original Message-
From: Eoff, Ullysses A
Sent: Tuesday, November 11, 2014 12:31 PM
To: intel-gfx@lists.freedesktop.org
Cc: Eoff, Ullysses A
Subject: [PATCH] drm/i915: expose a fixed brightness range to
On Tue, 11 Nov 2014 12:30:38 -0800
U. Artie Eoff ullysses.a.e...@intel.com wrote:
A userspace brightness range that is larger than the hardware
brightness range does not have a 1:1 mapping and can result
in brightness != actual_brightness for some values.
Expose a fixed brightness range of
Just like we do in the HDMI code, set the infoframe flag if we detect
that infoframes are enabled.
v2: check for actual infoframe status as in hdmi code (Daniel)
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_ddi.c | 8
1 file changed, 8
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Rodrigo Vivi
Sent: Friday, November 14, 2014 10:22 PM
To: intel-gfx@lists.freedesktop.org
Cc: Vivi, Rodrigo
Subject: [Intel-gfx] [PATCH 02/15] drm/i915: Introduce intel_psr.c
No functional
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Rodrigo Vivi
Sent: Friday, November 14, 2014 10:22 PM
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter; Vivi, Rodrigo
Subject: [Intel-gfx] [PATCH 03/15] drm/i915: Add PSR docbook
Let's
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Rodrigo Vivi
Sent: Friday, November 14, 2014 10:23 PM
To: intel-gfx@lists.freedesktop.org
Cc: Vivi, Rodrigo
Subject: [Intel-gfx] [PATCH 06/15] drm/i915: PSR get full link off x standby
from
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Rodrigo Vivi
Sent: Friday, November 14, 2014 10:23 PM
To: intel-gfx@lists.freedesktop.org
Cc: Vivi, Rodrigo
Subject: [Intel-gfx] [PATCH 08/15] drm/i915: remove PSR BDW single frame
update.
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Rodrigo Vivi
Sent: Friday, November 14, 2014 10:23 PM
To: intel-gfx@lists.freedesktop.org
Cc: Vivi, Rodrigo
Subject: [Intel-gfx] [PATCH 09/15] drm/i915: Fix intel_psr_is_enabled function
and
-Original Message-
From: Vivi, Rodrigo
Sent: Friday, November 14, 2014 10:23 PM
To: intel-gfx@lists.freedesktop.org
Cc: Vivi, Rodrigo; R, Durgadoss
Subject: [PATCH 10/15] drm/i915: Add PSR registers for PSR VLV/CHV.
Baytrail (Valleyview) and Braswell (Cherryview) uses a complete different
-Original Message-
From: Vivi, Rodrigo
Sent: Friday, November 14, 2014 10:23 PM
To: intel-gfx@lists.freedesktop.org
Cc: Vivi, Rodrigo; R, Durgadoss
Subject: [PATCH 11/15] drm/i915: PSR VLV/CHV: Introduce setup, enable and
disable functions
The biggest difference from HSW/BDW PSR here is
-Original Message-
From: Vivi, Rodrigo
Sent: Friday, November 14, 2014 10:23 PM
To: intel-gfx@lists.freedesktop.org
Cc: Vivi, Rodrigo; R, Durgadoss
Subject: [PATCH 12/15] drm/i915: VLV/CHV PSR Software timer mode
This patch introduces exit/activate functions for PSR
on VLV+. Since on VLV+
-Original Message-
From: Vivi, Rodrigo
Sent: Friday, November 14, 2014 10:23 PM
To: intel-gfx@lists.freedesktop.org
Cc: Vivi, Rodrigo; R, Durgadoss
Subject: [PATCH 13/15] drm/i915: VLV/CHV PSR: Increase wait delay time before
active PSR.
Since active function on VLV immediately activate
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Rodrigo Vivi
Sent: Friday, November 14, 2014 10:23 PM
To: intel-gfx@lists.freedesktop.org
Cc: Vivi, Rodrigo
Subject: [Intel-gfx] [PATCH 14/15] drm/i915: VLV/CHV PSR debugfs.
Add debugfs
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
-Summary-
Platform: baseline_drm_intel_nightly_pass_rate-patch_applied_pass_rate
BYT: pass/total=290/290-290/290
PNV:
On Thu, Nov 13, 2014 at 06:50:10PM -0800, Tom.O'rou...@intel.com wrote:
From: Tom O'Rourke Tom.O'rou...@intel.com
In sandybridge_pcode_read and sandybridge_pcode_write,
extend the mbox parameter from u8 to u32.
On Haswell and Sandybridge, bits 7:0 encode the mailbox
command and bits 28:8
On 18/11/14 15:00, Deepak S wrote:
On Monday 03 November 2014 06:59 PM, Dave Gordon wrote:
Fixes to both the LRC and the legacy ringbuffer code to correctly
calculate and update the available space in a ring.
The logical ring code was updating the software ring 'head' value
by reading the
On Mon, Nov 17, 2014 at 06:10:38PM -0800, Matt Roper wrote:
When using the universal plane interface, the source rectangle
coordinates define the panning offset for the primary plane, which needs
to be stored in crtc-{x,y}. The original universal plane code
negelected to set these panning
Fixes to both the LRC and the legacy ringbuffer code to correctly
calculate and update the available space in a ring.
The logical ring code was updating the software ring 'head' value
by reading the hardware 'HEAD' register. In LRC mode, this is not
valid as the hardware is not necessarily
The request queue is per-engine, and may therefore contain requests
from several different contexts/ringbuffers. In determining which
request to wait for, this function should only consider requests
from the ringbuffer that it's checking for space, and ignore any
that it finds that belong to other
There are numerous places in the code where the driver's idea of
how much space is left in a ring is updated using the driver's
latest notions of the positions of 'head' and 'tail' for the ring.
Among them are some that update one or both of these values before
(re)doing the calculation. In
The logical ring code was updating the software ring 'head' value
by reading the hardware 'HEAD' register. In LRC mode, this is not
valid as the hardware is not necessarily executing the same context
that is being processed by the software. Thus reading the h/w HEAD
could put an unrelated
On Tue, Nov 18, 2014 at 09:12:49AM -0800, Matt Roper wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
We need to get hdisplay and vdisplay in a few places so create a
helper to make our job easier.
v2 (by Matt): Use new stereo doubling function (suggested by Ville)
v3 (by
On Mon, Nov 17, 2014 at 06:10:39PM -0800, Matt Roper wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
After some refactor intel_primary_plane_setplane() does the same
as intel_pipe_set_base() so we can get rid of it and replace the calls
with intel_primary_plane_setplane().
On 2014-11-03 16:25, Daniel Vetter wrote:
On Sat, Nov 01, 2014 at 06:08:00PM +0100, Christian Kastner wrote:
[after upgrading dual-booted OSX to Yosemite, wich included firmware updates]
Here's what I see [in Linux 3.16, 3.17]:
$ GPE=/sys/firmware/acpi/interrupts/gpe66
$ while true; do
Might be helpful for debugging places where userspace ends up boosting
or waiting where it doesn't intend to.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_gem.c | 6 --
drivers/gpu/drm/i915/i915_trace.h | 15 +++
On Mon, 17 Nov 2014 18:10:39 -0800
Matt Roper matthew.d.ro...@intel.com wrote:
-static int
-intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
- struct drm_framebuffer *fb)
-{
I'm gonna miss this old function... But on the plus side I won't
confuse pipe_set_base and
Thanks Jesse for the ack.
Unfortunately I just learned from Stéphane that there
are certain devices which only support 256 levels, so this
patch would do us no good at solving the real issue for
such devices.
Why can't we just use a dynamic 1:1 mapping as was
suggested before? I would vote for
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Eoff, Ullysses A
Sent: Tuesday, November 18, 2014 3:19 PM
To: Jani Nikula; Jesse Barnes
Cc: stephane.marche...@gmail.com; intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx]
On Tue, Nov 18, 2014 at 3:18 PM, Eoff, Ullysses A
ullysses.a.e...@intel.com wrote:
Thanks Jesse for the ack.
Unfortunately I just learned from Stéphane that there
are certain devices which only support 256 levels, so this
patch would do us no good at solving the real issue for
such devices.
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
-Summary-
Platform: baseline_drm_intel_nightly_pass_rate-patch_applied_pass_rate
BYT: pass/total=290/290-290/290
PNV:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
We need to get hdisplay and vdisplay in a few places so create a
helper to make our job easier.
v2 (by Matt): Use new stereo doubling function (suggested by Ville)
v3 (by Matt):
- Add missing kerneldoc (Daniel)
- Use drm_mode_copy() (Jani)
Primary and sprite planes have already been refactored to include a
'prepare' step which handles all the commit-time operations that could
fail (i.e., pinning buffers and such). Refactor the cursor commit in a
similar manner.
For simplicity and consistency with other plane types, we also switch
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Merge it into the plane update_plane() callback and make other
users use the update_plane() functions instead.
The fb != crtc-cursor-fb was already inside intel_crtc_cursor_set_obj()
so we fold intel_crtc_cursor_set_obj() inside
Another iteration of the i915 display refactoring work in preparation for
atomic. The last patchset was posted here:
http://lists.freedesktop.org/archives/intel-gfx/2014-November/055702.html
This set incorporates the feedback from the last review and also adds an
additional patch at the
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
After some refactor intel_primary_plane_setplane() does the same
as intel_pipe_set_base() so we can get rid of it and replace the calls
with intel_primary_plane_setplane().
v2: take Ville's comments:
- get the right arguments for
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
-Summary-
Platform: baseline_drm_intel_nightly_pass_rate-patch_applied_pass_rate
BYT: pass/total=290/290-290/290
PNV:
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