On 7/27/2015 6:05 PM, Maarten Lankhorst wrote:
Signed-off-by: Maarten Lankhorst maarten.lankho...@linux.intel.com
---
drivers/gpu/drm/i915/intel_display.c | 7 --
drivers/gpu/drm/i915/intel_dp_mst.c | 45 +++-
2 files changed, 44 insertions(+), 8
Hi, Vivi:
Do you think this patch could resolve the following two issues ?
https://bugs.freedesktop.org/show_bug.cgi?id=91050
https://bugs.freedesktop.org/show_bug.cgi?id=91269
thanks
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
On Tue, Aug 04, 2015 at 06:30:25PM -0300, Tiago Vignatti wrote:
On 07/31/2015 06:02 PM, Chris Wilson wrote:
The first problem is that llc does not guarrantee that the buffer is
cache coherent with all aspects of the GPU. For scanout and similar
writes need to be WC.
if
Arun Siluvery arun.siluv...@linux.intel.com writes:
Atleast one component of one valid vertex element must be enabled.
Cc: Ben Widawsky benjamin.widaw...@intel.com
Cc: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Arun Siluvery arun.siluv...@linux.intel.com
---
Please resend the
On 7/30/2015 4:18 PM, Singh, Gaurav K wrote:
On 7/24/2015 5:54 PM, Deepak M wrote:
In CABC (Content Adaptive Brightness Control) content grey level
scale can be increased while simultaneously decreasing
brightness of the backlight to achieve same perceived brightness.
The CABC is not
On Thu, Jul 30, 2015 at 11:48:12PM +, Rodrigo Vivi wrote:
Very good. I should've added this when adding the dirtyfb flush...
Thanks,
Reviewed-by: Rodrigo Vivi rodrigo.v...@intel.com
Merged entire series, thanks.
-Daniel
On Tue, Jul 14, 2015 at 12:30 PM Paulo Zanoni
On Mon, Aug 03, 2015 at 10:20:29AM +0100, Tvrtko Ursulin wrote:
On 07/27/2015 03:00 PM, Daniel Vetter wrote:
On Mon, Jul 27, 2015 at 02:20:43PM +0100, Tvrtko Ursulin wrote:
On 07/17/2015 03:31 PM, john.c.harri...@intel.com wrote:
From: John Harrison john.c.harri...@intel.com
The
On Thu, Jul 30, 2015 at 04:26:39PM -0700, Rodrigo Vivi wrote:
This is just a preparation patch to make clear what operation we
are performing. There is no functional change on the sink crc
logic.
hsw_disable_ips has been moved a bit further in the start function
to avoid disabling ips when
On Thu, Jul 30, 2015 at 05:07:55PM -0700, Rodrigo Vivi wrote:
Since active function on VLV immediately activate PSR let's give more
time for idleness. Different from core platforms where we have idle_frames
count.
Also kms_psr_sink_crc now is automated and always get this:
Ben Widawsky benjamin.widaw...@intel.com writes:
On Fri, Jul 31, 2015 at 04:27:07PM +0100, Arun Siluvery wrote:
A programming restriction exists for this instruction, atleast one component
of one valid vertex element must be enabled.
Cc: Ben Widawsky benjamin.widaw...@intel.com
Cc: Chris
On Thu, Jul 30, 2015 at 02:52:07PM -0700, Rodrigo Vivi wrote:
good catch.
Reviewed-by: Rodrigo Vivi rodrigo.v...@intel.com
Queued for -next, thanks for the patch.
-Daniel
On Wed, Jul 29, 2015 at 12:21 PM, Marc Herbert marc.herb...@intel.com wrote:
With this simple git diff command one
Hi,
On 21/07/15 14:28, Maarten Lankhorst wrote:
In intel it's useful to keep track of some state changes with old
crtc state vs new state, for example to disable initial planes or
when a modeset's prevented during fastboot.
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Maarten
On Thu, Jul 30, 2015 at 06:20:28PM -0300, Paulo Zanoni wrote:
From: Damien Lespiau damien.lesp...@intel.com
Before this patch, we used the intel_display_power_{get,put} functions
to make sure the PW1 and Misc I/O power wells were enabled all the
time while LCPLL was enabled. We called a
On Tue, Aug 04, 2015 at 06:30:08PM -0300, Paulo Zanoni wrote:
I started digging this when I noticed that the BDW code was just
reserving 1mb by coincidence since it was reading reserved fields.
Then I noticed we didn't have any values set for SNB and earlier, and
that the HSW sizes were wrong.
On Tue, Aug 04, 2015 at 04:53:11PM -0300, Paulo Zanoni wrote:
If the Kernel is too old, getparam will return -EINVAL. Just SKIP on
this case.
Nope. Just replace do_ioctl() with drmIoctl. Better would be to actually
do a gem_get_param().
-Chris
--
Chris Wilson, Intel Open Source Technology
On Fri, Jul 31, 2015 at 11:15:27AM +0100, Chris Wilson wrote:
Older VBT (e.g. gen2) have smaller child block defintions, so do not cry
wolf over an error that is outside of our control and is not an error
anyway.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
On Fri, Jul 31, 2015 at 04:11:07PM -0400, Micah Fedke wrote:
---
lib/drmtest.c | 108
++
lib/drmtest.h | 18 +++---
2 files changed, 86 insertions(+), 40 deletions(-)
diff --git a/lib/drmtest.c b/lib/drmtest.c
index
On Fri, Jul 31, 2015 at 04:11:08PM -0400, Micah Fedke wrote:
As Chris suggested please include the cocci snippet in the commit message.
It's easier to review that than the massive patch. Also in case of
conflicts I can just regen.
In general please don't do 1-line commit message like in this
On Fri, Jul 31, 2015 at 04:11:07PM -0400, Micah Fedke wrote:
---
lib/drmtest.c | 108
++
lib/drmtest.h | 18 +++---
2 files changed, 86 insertions(+), 40 deletions(-)
diff --git a/lib/drmtest.c b/lib/drmtest.c
index
On Wed, Aug 05, 2015 at 10:34:07AM +0200, Daniel Vetter wrote:
On Fri, Jul 31, 2015 at 11:15:27AM +0100, Chris Wilson wrote:
Older VBT (e.g. gen2) have smaller child block defintions, so do not cry
wolf over an error that is outside of our control and is not an error
anyway.
On Fri, Jul 31, 2015 at 04:11:10PM -0400, Micah Fedke wrote:
---
lib/igt_kms.c | 13 +++--
lib/igt_kms.h | 2 +-
tests/kms_flip.c | 2 +-
tests/kms_pipe_crc_basic.c | 2 +-
4 files changed, 10 insertions(+), 9 deletions(-)
diff --git
On Fri, Jul 31, 2015 at 04:11:11PM -0400, Micah Fedke wrote:
Same comment about lack of commit message and coding style mangling. Also
seems to contain some unrelated changes ...
-Daniel
---
tests/drm_read.c | 101
++-
1 file changed, 55
On Mon, Aug 03, 2015 at 03:01:01PM +0530, Praveen Paneri wrote:
This patch exposes a new debugfs interface 'i915_rps_disable'
Following 2 values shall be echoed into this file.
'0' - RPS explicitly enabled .
'1' - RPS explicitly disabled.
This interface provides capabilty to enable/disable
On Tue, Aug 04, 2015 at 04:55:52PM +0300, David Weinehall wrote:
VBT version 196 increased the size of common_child_dev_config. The parser
code assumed that the size of this structure would not change.
The modified code now copies the amount needed based on the VBT version,
and emits a debug
On Tue, Aug 04, 2015 at 11:25:40AM +0530, Animesh Manna wrote:
On 8/4/2015 9:16 AM, Nagaraju, Vathsala wrote:
This patch contains the changes to remove the byte swapping logic
introduced with old dmc firmware.
Which version of DMC need reversal logic? Atleast , 4,1.16,1.18 follow the
On Mon, Aug 03, 2015 at 09:55:33PM +0530, Animesh Manna wrote:
Mmio register access after dc6/dc5 entry is not allowed when
DC6 power states are enabled according to bspec (bspec-id 0527),
so enabling dc6 as the last call in suspend flow.
v1: Initial version.
v2: commit message updated
On Tue, Aug 04, 2015 at 04:55:59PM +0530, Sunil Kamath wrote:
On Monday 03 August 2015 09:55 PM, Animesh Manna wrote:
Mmio register access after dc6/dc5 entry is not allowed when
DC6 power states are enabled according to bspec (bspec-id 0527),
so enabling dc6 as the last call in suspend flow.
On Mon, Aug 03, 2015 at 09:55:34PM +0530, Animesh Manna wrote:
While display engine entering into low power state no need to disable
cdclk pll as CSR firmware of dmc will take care. If pll is already
enabled firmware execution sequence will be blocked. This is one
of the criteria for dmc to
On Mon, Aug 03, 2015 at 09:55:35PM +0530, Animesh Manna wrote:
Another interesting criteria to work dmc as expected is pw1 to be
enabled by driver and dmc will shut it off in its execution
sequence. If already disabled by driver dmc will get confuse and
behave differently than expected found
On Tue, Aug 04, 2015 at 10:01:43AM +0100, Siluvery, Arun wrote:
On 04/08/2015 09:58, Mika Kuoppala wrote:
Ben Widawsky benjamin.widaw...@intel.com writes:
On Mon, Aug 03, 2015 at 08:24:56PM +0100, Arun Siluvery wrote:
Cc: Ben Widawsky benjamin.widaw...@intel.com
Cc: Joonas Lahtinen
On Wed, Aug 05, 2015 at 11:25:43AM +0530, sourab.gu...@intel.com wrote:
@@ -555,10 +558,12 @@ static void forward_one_gen_pmu_sample(struct
drm_i915_private *dev_priv,
struct drm_i915_ts_node_ctx_id *ctx_info;
struct drm_i915_ts_node_ring_id *ring_info;
struct
On Wed, Aug 05, 2015 at 11:25:37AM +0530, sourab.gu...@intel.com wrote:
+static void gen_buffer_destroy(struct drm_i915_private *i915)
+{
+ mutex_lock(i915-dev-struct_mutex);
+ vunmap(i915-gen_pmu.buffer.addr);
+ i915_gem_object_ggtt_unpin(i915-gen_pmu.buffer.obj);
+
On Wed, Aug 05, 2015 at 11:25:41AM +0530, sourab.gu...@intel.com wrote:
@@ -542,18 +548,27 @@ static void forward_one_gen_pmu_sample(struct
drm_i915_private *dev_priv,
struct perf_sample_data data;
struct perf_event *event = dev_priv-gen_pmu.exclusive_event;
int
On Wed, Aug 05, 2015 at 10:17:55AM +0100, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:43AM +0530, sourab.gu...@intel.com wrote:
@@ -555,10 +558,12 @@ static void forward_one_gen_pmu_sample(struct
drm_i915_private *dev_priv,
struct drm_i915_ts_node_ctx_id *ctx_info;
struct
On Wed, Aug 05, 2015 at 11:25:40AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
This patch adds the routines through which one can insert commands in the
ringbuf for capturing timestamps, which are used to insert these commands
around the batchbuffer.
On Wed, Aug 05, 2015 at 11:25:37AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
The current perf PMU driver is specific for collection of OA counter
statistics (which may be done in a periodic or asynchronous way). Since
this enables us (and limits us) to
On Wed, 2015-08-05 at 09:22 +, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:37AM +0530, sourab.gu...@intel.com wrote:
+static void gen_buffer_destroy(struct drm_i915_private *i915)
+{
+ mutex_lock(i915-dev-struct_mutex);
+ vunmap(i915-gen_pmu.buffer.addr);
+
On Wed, 2015-08-05 at 09:38 +, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:37AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
The current perf PMU driver is specific for collection of OA counter
statistics (which may be done in a periodic or
On Wed, 2015-08-05 at 15:17 +0530, sourab gupta wrote:
On Wed, 2015-08-05 at 09:38 +, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:37AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
The current perf PMU driver is specific for collection of OA
On Mon, 2015-07-27 at 11:02 +0530, Sonika Jindal wrote:
WA for BXT A0/A1, where DDIB's HPD pin is swapped to DDIA, so enabling
DDIA HPD pin in place of DDIB.
v2: For DP, irq_port is used to determine the encoder instead of
hpd_pin and removing the edp HPD logic because port A HPD is not
On Wed, 2015-08-05 at 09:30 +, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:40AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
This patch adds the routines through which one can insert commands in the
ringbuf for capturing timestamps, which are
On Wed, Aug 05, 2015 at 11:25:38AM +0530, sourab.gu...@intel.com wrote:
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 66f9ee9..08235582 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1676,6 +1676,13 @@ struct
On Wed, Aug 05, 2015 at 09:45:28AM +, Gupta, Sourab wrote:
On Wed, 2015-08-05 at 09:38 +, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:37AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
The current perf PMU driver is specific for
On Wed, 2015-07-15 at 09:25 +0530, Jindal, Sonika wrote:
On 7/14/2015 7:59 PM, Imre Deak wrote:
On ti, 2015-07-14 at 17:21 +0530, Sonika Jindal wrote:
Adding this for SKL onwards.
v2: Adding checks for VLV/CHV as well. Reusing old ibx and g4x functions
to check digital port status.
On Wed, Aug 05, 2015 at 11:25:44AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
This patch adds support for retrieving MMIO register values alongwith
timestamps and forwarding them to userspace through perf.
The userspace can request upto 8 MMIO register
On 8/5/2015 3:23 PM, Imre Deak wrote:
On Mon, 2015-07-27 at 11:02 +0530, Sonika Jindal wrote:
WA for BXT A0/A1, where DDIB's HPD pin is swapped to DDIA, so enabling
DDIA HPD pin in place of DDIB.
v2: For DP, irq_port is used to determine the encoder instead of
hpd_pin and removing the edp
On Wed, 2015-08-05 at 10:03 +, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:44AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
This patch adds support for retrieving MMIO register values alongwith
timestamps and forwarding them to userspace
On Wed, Aug 05, 2015 at 10:18:50AM +, Gupta, Sourab wrote:
On Wed, 2015-08-05 at 10:03 +, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:44AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
This patch adds support for retrieving MMIO register
Fully remove the MST connector from the atomic state, and remove the
early returns in check_*_state for MST connectors.
With atomic the state can be made consistent all the time.
Changes since v1:
- Remove the MST check in intel_connector_check_state too.
Signed-off-by: Maarten Lankhorst
First step in removing dpms and validating atomic state.
There can still be a mismatch in the connector state because the dpms
callbacks are still used, but this can not happen immediately after a modeset.
Signed-off-by: Maarten Lankhorst maarten.lankho...@linux.intel.com
Reviewed-by: Ander
The rest will be a noop anyway, since without modeset there will be
no updated dplls and no modeset state to update.
Signed-off-by: Maarten Lankhorst maarten.lankho...@linux.intel.com
---
drivers/gpu/drm/i915/intel_display.c | 30 +++---
1 file changed, 7 insertions(+),
Instead of allocating pipe_config on the stack use the old
crtc_state, it's only going to freed from this point on.
All crtc' are now only checked once during modeset,
because false positives can happen with encoders after
dpms changes and to limit the amount of errors for 1 failure.
Changes
Set connectors_changed to force a modeset if the panel fitter's force
enabled on eDP.
Changes since v1:
- Use connectors_changed instead of active_changed because it's a
routing update.
Signed-off-by: Maarten Lankhorst maarten.lankho...@linux.intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c
There are no more users, byebye!
Signed-off-by: Maarten Lankhorst maarten.lankho...@linux.intel.com
Reviewed-by: Ander Conselvan de Oliveira conselv...@gmail.com
---
drivers/gpu/drm/i915/intel_display.c | 37 +---
drivers/gpu/drm/i915/intel_drv.h | 1 -
2
Connectors are updated atomically now, so the only interaction
with the encoder is through base.crtc.
If it's NULL the encoder's not part of any crtc, and if it's
not NULL then active should be equal to crtc_state-active.
Signed-off-by: Maarten Lankhorst maarten.lankho...@linux.intel.com
This is handled by the atomic core now, no need to check this for ourself.
Signed-off-by: Maarten Lankhorst maarten.lankho...@linux.intel.com
Reviewed-by: Ander Conselvan de Oliveira conselv...@gmail.com
---
drivers/gpu/drm/i915/intel_display.c | 19 +--
1 file changed, 1
Now that everything's atomic, checking encoder-base.crtc is enough.
This function doesn't have the locks to dereference crtc-state, but
stealing an encoder bound to any crtc is probably enough reason to warn.
Changes since v1:
- Commit message.
Cc: Ville Syrjälä ville.syrj...@linux.intel.com
-EDEADLK has special meaning in atomic, but get_fence may call
i915_find_fence_reg which can return -EDEADLK.
This has special meaning in the atomic world, so convert the error
to -EBUSY for this case.
Changes since v1:
- Add comment in the code.
Signed-off-by: Maarten Lankhorst
Mixed bag of fixes for -next now that the first merge happened.
Patch series deals with getting rid of intel DPMS handling and
making the state checker atomic.
The state checker is now atomic and only checks the affected
crtc's, encoders and connectors.
This is just a resend with all the fixes
connectors_active will be removed, so just calculate this instead.
Changes since v1:
- Look for the right pointer in intel_sanitize_encoder.
Signed-off-by: Maarten Lankhorst maarten.lankho...@linux.intel.com
Reviewed-by: Ander Conselvan de Oliveira conselv...@gmail.com
---
Right now dpms callbacks can still fiddle with the connector state,
but it can only turn connectors off.
This is remediated by only checking crtc-state-active when the
connector is active, and ignore crtc-state-active when the
connector is off.
connectors_active is no longer checked, and will be
From: Patrik Jakobsson patrik.jakobs...@linux.intel.com
When reading out hw state for planes we disable inactive planes which in
turn triggers an update of the watermarks. The update depends on the
crtc_clock being set which is done when reading out encoders. Thus
postpone the plane readout until
Op 05-08-15 om 10:05 schreef Daniel Vetter:
On Mon, Aug 03, 2015 at 10:20:29AM +0100, Tvrtko Ursulin wrote:
On 07/27/2015 03:00 PM, Daniel Vetter wrote:
On Mon, Jul 27, 2015 at 02:20:43PM +0100, Tvrtko Ursulin wrote:
On 07/17/2015 03:31 PM, john.c.harri...@intel.com wrote:
From: John Harrison
On Wed, Aug 05, 2015 at 09:49:39AM +, Gupta, Sourab wrote:
On Wed, 2015-08-05 at 15:17 +0530, sourab gupta wrote:
On Wed, 2015-08-05 at 09:38 +, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:37AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
We want to make sure that no one tries to acquire more locks and
states, and ww mutexes provide debug facilities for that. So use them.
Cc: Rob Clark robdcl...@gmail.com
Cc: Maarten Lankhorst maarten.lankho...@linux.intel.com
Signed-off-by: Daniel Vetter daniel.vet...@intel.com
---
On 05/04/2015 03:29 PM, Daniel Vetter wrote:
On Fri, Apr 24, 2015 at 06:07:05PM +, Konduru, Chandra wrote:
-Original Message-
From: Konduru, Chandra
Sent: Friday, April 24, 2015 10:53 AM
To: 'Tvrtko Ursulin'; Intel-gfx@lists.freedesktop.org
Cc: Ursulin, Tvrtko
Subject: RE:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Sounds like a useful thing to test going straight from 90 to 270 degrees,
without resetting to no rotation in between.
Signed-off-by: Tvrtko Ursulin tvrtko.ursu...@intel.com
---
tests/kms_rotation_crc.c | 42
On Wed, Aug 05, 2015 at 02:20:17PM +0100, Tvrtko Ursulin wrote:
On 05/04/2015 03:29 PM, Daniel Vetter wrote:
On Fri, Apr 24, 2015 at 06:07:05PM +, Konduru, Chandra wrote:
-Original Message-
From: Konduru, Chandra
Sent: Friday, April 24, 2015 10:53 AM
To: 'Tvrtko Ursulin';
On Wed, Aug 5, 2015 at 10:29 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Aug 05, 2015 at 10:17:55AM +0100, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:43AM +0530, sourab.gu...@intel.com wrote:
@@ -555,10 +558,12 @@ static void forward_one_gen_pmu_sample(struct
drm_i915_private
On Wed, Aug 05, 2015 at 12:36:59PM +0200, Maarten Lankhorst wrote:
Set connectors_changed to force a modeset if the panel fitter's force
enabled on eDP.
Changes since v1:
- Use connectors_changed instead of active_changed because it's a
routing update.
Signed-off-by: Maarten Lankhorst
On 08/05/2015 02:58 PM, Daniel Vetter wrote:
On Wed, Aug 05, 2015 at 02:20:17PM +0100, Tvrtko Ursulin wrote:
On 05/04/2015 03:29 PM, Daniel Vetter wrote:
On Fri, Apr 24, 2015 at 06:07:05PM +, Konduru, Chandra wrote:
-Original Message-
From: Konduru, Chandra
Sent: Friday,
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
The loop below does nothing if scaler_users has no bits set so
it is safe to bail out early in order to avoid dmesg spam, on
for example cursor updates.
v2: Commit message and rebase.
Signed-off-by: Tvrtko Ursulin tvrtko.ursu...@intel.com
Cc:
On 08/05/2015 03:12 PM, Tvrtko Ursulin wrote:
On 08/05/2015 02:58 PM, Daniel Vetter wrote:
On Wed, Aug 05, 2015 at 02:20:17PM +0100, Tvrtko Ursulin wrote:
On 05/04/2015 03:29 PM, Daniel Vetter wrote:
On Fri, Apr 24, 2015 at 06:07:05PM +, Konduru, Chandra wrote:
-Original
tree: git://anongit.freedesktop.org/drm-intel for-linux-next
head: 574a8ff34ee3f9353cf5bb6b4bff732387cf03c6
commit: 574a8ff34ee3f9353cf5bb6b4bff732387cf03c6 [478/478] drm/i915: Make the
force_thru workaround atomic, v2.
config: i386-randconfig-i1-201531 (attached as .config)
reproduce:
git
On Wed, 2015-08-05 at 10:30 +, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 10:18:50AM +, Gupta, Sourab wrote:
On Wed, 2015-08-05 at 10:03 +, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:44AM +0530, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
If we shut down the crtc we might run into WM consistency checks which
fail because we haven't yet read out the WM state. So do that before
we sanitized the state.
This fixes a WARNING in the ilk wm code which assumes that level 0 WM
are always enabled in it's internal tracking. But since we
Arun Siluvery arun.siluv...@linux.intel.com writes:
This WA is implemented in init_context as well as WA batch init.
There are also some dependent bits need to be set in other registers
for this to be complete.
v2: behaviour of disable gather at set shader bit can be specified by
two
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Only disable scalers once when transitioning from enabled state.
Avoids a lot of log noise as a side effect.
Signed-off-by: Tvrtko Ursulin tvrtko.ursu...@intel.com
Cc: Chandra Konduru chandra.kond...@intel.com
---
Compile tested only due momentary
On Wed, Aug 5, 2015 at 4:57 PM, Maarten Lankhorst
maarten.lankho...@linux.intel.com wrote:
Op 05-08-15 om 15:08 schreef Daniel Vetter:
We want to make sure that no one tries to acquire more locks and
states, and ww mutexes provide debug facilities for that. So use them.
Cc: Rob Clark
Hey,
Op 05-08-15 om 15:08 schreef Daniel Vetter:
We want to make sure that no one tries to acquire more locks and
states, and ww mutexes provide debug facilities for that. So use them.
Cc: Rob Clark robdcl...@gmail.com
Cc: Maarten Lankhorst maarten.lankho...@linux.intel.com
Signed-off-by:
On 08/05/2015 03:19 PM, Tvrtko Ursulin wrote:
[snip]
Atomic is really complicated, but doing fully diagnostics for each
frame
is also way too noisy. For that reason we've add a DRM_DEBUG_ATOMIC
which
can be used for all these state tracking debug lines.
We didn't do anything here and I just
On 05/08/2015 15:45, Mika Kuoppala wrote:
Arun Siluvery arun.siluv...@linux.intel.com writes:
This WA is implemented in init_context as well as WA batch init.
There are also some dependent bits need to be set in other registers
for this to be complete.
v2: behaviour of disable gather at set
On Wed, Aug 05, 2015 at 02:59:03PM +0100, Robert Bragg wrote:
On Wed, Aug 5, 2015 at 10:29 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Aug 05, 2015 at 10:17:55AM +0100, Chris Wilson wrote:
On Wed, Aug 05, 2015 at 11:25:43AM +0530, sourab.gu...@intel.com wrote:
@@ -555,10 +558,12 @@
On Wed, Jul 29, 2015 at 05:23:46PM +0100, Michel Thierry wrote:
This transitional patch doesn't do much for the existing code. However,
it should make upcoming patches to use the full 48b address space a bit
easier.
commit message should also mention how exactly it's more dynamic and why
On Wed, Aug 05, 2015 at 10:59:00AM +0200, Daniel Vetter wrote:
On Tue, Aug 04, 2015 at 04:55:52PM +0300, David Weinehall wrote:
VBT version 196 increased the size of common_child_dev_config. The parser
code assumed that the size of this structure would not change.
The modified code now
On Fri, Jul 31, 2015 at 09:41:11AM +0530, Goel, Akash wrote:
Reviewed the patch it looks fine.
Reviewed-by: Akash Goel akash.g...@intel.com
Just an aside is not required in your tag here and actually breaks it
as a proper mail address - if needed should only wrap the name, but
must not
On Mon, Aug 03, 2015 at 09:53:27AM +0100, Michel Thierry wrote:
When 48b is enabled, gen8_ppgtt_insert_entries needs to read the Page Map
Level 4 (PML4), before it selects which Page Directory Pointer (PDP)
it will write to.
Similarly, gen8_ppgtt_clear_range needs to get the correct PDP/PD
On 8/5/2015 4:31 PM, Daniel Vetter wrote:
On Wed, Jul 29, 2015 at 05:23:46PM +0100, Michel Thierry wrote:
This transitional patch doesn't do much for the existing code. However,
it should make upcoming patches to use the full 48b address space a bit
easier.
commit message should also mention
On 8/5/2015 4:49 PM, Michel Thierry wrote:
On 8/5/2015 4:31 PM, Daniel Vetter wrote:
On Wed, Jul 29, 2015 at 05:23:46PM +0100, Michel Thierry wrote:
v8: Rebase after final merged version of Mika's ppgtt/scratch patches.
v9: Introduce PML4 (and 48-bit checks) until next patch (Akash).
v10: Also
On Wed, Jul 29, 2015 at 05:24:01PM +0100, Michel Thierry wrote:
There are some allocations that must be only referenced by 32-bit
offsets. To limit the chances of having the first 4GB already full,
objects not requiring this workaround use DRM_MM_SEARCH_BELOW/
DRM_MM_CREATE_TOP flags
In
On 04/08/15 09:56, Morton, Derek J wrote:
Bump.
Can this be merged? It only affects android and addresses an issue causing igt
to fail to build at all on android.
//Derek
-Original Message-
From: Morton, Derek J
Sent: Monday, July 27, 2015 11:31 AM
To:
On Wed, Jul 29, 2015 at 05:23:59PM +0100, Michel Thierry wrote:
Otherwise it can overflow in 48-bit mode, and cause an incorrect
exec_start.
Before commit 5f19e2bffa63a91cd4ac1adcec648e14a44277ce (drm/i915: Merged
the many do_execbuf() parameters into a structure), it was already an u64.
On 8/5/2015 4:46 PM, Daniel Vetter wrote:
On Mon, Aug 03, 2015 at 09:53:27AM +0100, Michel Thierry wrote:
@@ -735,12 +736,21 @@ static void gen8_ppgtt_clear_range(struct
i915_address_space *vm,
{
struct i915_hw_ppgtt *ppgtt =
container_of(vm, struct i915_hw_ppgtt,
On 8/5/2015 5:01 PM, Daniel Vetter wrote:
On Wed, Jul 29, 2015 at 05:23:59PM +0100, Michel Thierry wrote:
Otherwise it can overflow in 48-bit mode, and cause an incorrect
exec_start.
Before commit 5f19e2bffa63a91cd4ac1adcec648e14a44277ce (drm/i915: Merged
the many do_execbuf() parameters into
On 8/5/2015 4:58 PM, Daniel Vetter wrote:
On Wed, Jul 29, 2015 at 05:24:01PM +0100, Michel Thierry wrote:
There are some allocations that must be only referenced by 32-bit
offsets. To limit the chances of having the first 4GB already full,
objects not requiring this workaround use
On Wed, Aug 5, 2015 at 4:25 PM, Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Aug 05, 2015 at 02:59:03PM +0100, Robert Bragg wrote:
On Wed, Aug 5, 2015 at 10:29 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Aug 05, 2015 at 10:17:55AM +0100, Chris Wilson wrote:
On Wed, Aug 05, 2015 at
Just don't check the drmIoctl() return code: the if (val) should be
enough to prevent any problems.
v2: Don't SKIP, just proceed (Chris).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89739
Cc: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
Op 05-08-15 om 17:03 schreef Daniel Vetter:
On Wed, Aug 5, 2015 at 4:57 PM, Maarten Lankhorst
maarten.lankho...@linux.intel.com wrote:
Op 05-08-15 om 15:08 schreef Daniel Vetter:
We want to make sure that no one tries to acquire more locks and
states, and ww mutexes provide debug facilities
On Wed, Aug 05, 2015 at 11:13:46AM +0300, Mika Kuoppala wrote:
Ben Widawsky benjamin.widaw...@intel.com writes:
On Fri, Jul 31, 2015 at 04:27:07PM +0100, Arun Siluvery wrote:
A programming restriction exists for this instruction, atleast one
component
of one valid vertex element must
2015-08-05 5:30 GMT-03:00 Daniel Vetter dan...@ffwll.ch:
On Thu, Jul 30, 2015 at 06:20:28PM -0300, Paulo Zanoni wrote:
From: Damien Lespiau damien.lesp...@intel.com
Before this patch, we used the intel_display_power_{get,put} functions
to make sure the PW1 and Misc I/O power wells were
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