On Wed, Aug 05, 2015 at 02:59:28PM -0300, Paulo Zanoni wrote:
Just don't check the drmIoctl() return code: the if (val) should be
enough to prevent any problems.
v2: Don't SKIP, just proceed (Chris).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89739
Cc: Chris Wilson
On Jul 30 2015 or thereabouts, Sivakumar Thulasimani wrote:
On 7/29/2015 8:52 PM, Benjamin Tissoires wrote:
On Jul 29 2015 or thereabouts, Sivakumar Thulasimani wrote:
why not detect reverse in intel_dp_detect/intel_hpd_pulse ? that way you can
identify both lane count and reversal state
On 08/05/2015 04:08 AM, Daniel Vetter wrote:
On Tue, Aug 04, 2015 at 06:30:25PM -0300, Tiago Vignatti wrote:
Nah they don't have to be equal since the problem isn't that nothing goes
out to memory where the display can see it, but usually only parts of it.
I.e. you need to change your test to
-
On Wed, Aug 5, 2015 at 6:55 AM, sourab.gu...@intel.com wrote:
From: Sourab Gupta sourab.gu...@intel.com
This patch adds support for retrieving MMIO register values alongwith
timestamps and forwarding them to userspace through perf.
The userspace can request upto 8 MMIO register values to be
On Wed, 2015-08-05 at 10:07 +0200, Daniel Vetter wrote:
On Thu, Jul 30, 2015 at 04:26:39PM -0700, Rodrigo Vivi wrote:
This is just a preparation patch to make clear what operation we
are performing. There is no functional change on the sink crc
logic.
hsw_disable_ips has been moved a
SKL-Y can now use the same programming for all VccIO values after an adjustment
to I_boost.
SKL-U DP table adjustments.
1. Remove SKL Y 0.95V from SKL H and S columns in all tables. The
other SKL Y column removes the 0.85V VccIO so it now applies to all voltages.
2. DP table changes
Userspace is the one in charge of flush CPU by wrapping mmap with
begin{,end}_cpu_access.
v2: Remove LLC check cause we have dma-buf sync providers now. Also, fix return
before transferring ownership when mmap fails.
Signed-off-by: Tiago Vignatti tiago.vigna...@intel.com
---
From: Daniel Vetter daniel.vet...@ffwll.ch
FIXME: Update kerneldoc for begin/end to make it clear that those are
for mmap too.
Open: Do we need a special indication that the begin/end is from
userspace mmap and not from kernel mmap?
There's also the question already about kernel internal users
Hi,
I've tested these patches (in drm-intel-nightly, but also in CrOS kernel
v3.14) and they seem just enough for what we want to do: the idea is to create
a GEM bo in one process and pass the prime handle of the it to another
process, which in turn uses the handle only to map and write. This
From: Daniel Thompson daniel.thomp...@linaro.org
Currently DRM_IOCTL_PRIME_HANDLE_TO_FD rejects all flags except
(DRM|O)_CLOEXEC making it difficult (maybe impossible) for userspace
to mmap() the resulting dma-buf even when this is supported by the
DRM driver.
It is trivial to relax the
Op 06-08-15 om 00:25 schreef Daniel Vetter:
On Wed, Aug 5, 2015 at 8:13 PM, Maarten Lankhorst
maarten.lankho...@linux.intel.com wrote:
Op 05-08-15 om 17:03 schreef Daniel Vetter:
On Wed, Aug 5, 2015 at 4:57 PM, Maarten Lankhorst
maarten.lankho...@linux.intel.com wrote:
Op 05-08-15 om 15:08
On Wed, Aug 5, 2015 at 8:13 PM, Maarten Lankhorst
maarten.lankho...@linux.intel.com wrote:
Op 05-08-15 om 17:03 schreef Daniel Vetter:
On Wed, Aug 5, 2015 at 4:57 PM, Maarten Lankhorst
maarten.lankho...@linux.intel.com wrote:
Op 05-08-15 om 15:08 schreef Daniel Vetter:
We want to make sure
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