I was following your doumention on this URL
"https://01.org/linuxgraphics/documentation/build-guide-0";. THE GIT WEBSITE is
not responding
# git clone git://anongit.freedesktop.org/mesa/drm
Cloning into 'drm'...
fatal: unable to connect to anongit.freedesktop.org:
anongit.freedesktop.org[0: 131.
On Fri, 14 Aug 2015, Daniel Vetter wrote:
> On Fri, Aug 14, 2015 at 12:59:19PM +0100, Chris Wilson wrote:
>> Everytime we use the logical context with execlists it becomes dirty (as
>> the hardware will write the new register values afterwards, as well as
>> the GPU state that will be used). We ne
On Fri, 14 Aug 2015, Jesse Barnes wrote:
> On 08/14/2015 09:07 AM, Daniel Vetter wrote:
>> On Fri, Aug 14, 2015 at 08:20:22AM -0700, Jesse Barnes wrote:
>>> git clean updates the .gitignore file? Not having to run git clean is the
>>> whole point of this patch...
>>
>> I looked at this patch fi
v2: fix one error found by checkpath.pl
v3: Add one ignored break for switch-case. DDI-E hotplug
function doesn't work after updating drm-intel tree,
I checked the code and found this missing which isn't
the root cause for broke DDI-E hp. The broken
DDI-E hp function is fixed by "A
DDI-E doesn't have the correspondent GMBUS pin.
We rely on VBT to tell us which one it being used instead.
The DVI/HDMI on shared port couldn't exist.
This patch isn't tested without hardware wchich has HDMI
on DDI-E.
v2: fix trailing whitespace
v3: MISSING_CASE take place of BUG()
Signed-off-
Hey,
Op 06-07-15 om 14:09 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> While working on CHV DPIO powergating I relized DP .compute_config() was
> clobbering lane_count etc. stored in intel_dp. This could cause problems
> if we do the .compute_config() but later fail the modese
Set DRIVER_MODESET and DRIVER_ATOMIC by default. The driver is fully atomic.
Remove the legacy suspend/resume, to fix a warning introduced by:
"drm: WARN_ON if a modeset driver uses legacy suspend/resume helpers"
and removing the .get_vblank_timestamp reset to NULL. It's a noop without UMS.
Sign
On Fri, 2015-08-14 at 15:13 +0200, Daniel Vetter wrote:
> On Fri, Aug 14, 2015 at 01:03:20PM +0300, Mika Kahola wrote:
> > From EDID we can read and request higher pixel clock than
> > our HW can support. This set of patches add checks if
> > requested pixel clock is lower than the one supported by
On Mon, Aug 17, 2015 at 12:00:38PM +0200, Maarten Lankhorst wrote:
> Set DRIVER_MODESET and DRIVER_ATOMIC by default. The driver is fully atomic.
> Remove the legacy suspend/resume, to fix a warning introduced by:
>
> "drm: WARN_ON if a modeset driver uses legacy suspend/resume helpers"
>
> and r
On Sun, 26 Jul 2015, Uma Shankar wrote:
> From: Shashank Sharma
>
> This patch adds new functions for BXT clock and PLL programming.
> They are:
> 1. configure_dsi_pll for BXT.
>This function does the basic math and generates the divider ratio
>based on requested pixclock, and program clo
On Sun, 26 Jul 2015, Uma Shankar wrote:
> From: Shashank Sharma
>
> This patch modifies dsi_prepare() function to support the same
> modeset prepare sequence for BXT also. Main changes are:
> 1. BXT port control register is different than VLV.
> 2. BXT modeset sequence needs vdisplay and hdisplay
From: Libin Yang
When modeset occurs and the TMDS frequency is set to some
speical values, the N/CTS need to be set manually if audio
is playing.
Signed-off-by: Libin Yang
---
drivers/gpu/drm/i915/i915_reg.h| 8
drivers/gpu/drm/i915/intel_audio.c | 40
From: Libin Yang
For display audio, call the sync_audio_rate callback function
to do the synchronization between gfx driver and audio driver.
Signed-off-by: Libin Yang
---
sound/pci/hda/patch_hdmi.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/sound/pci/hda/patch_hd
From: Libin Yang
Add the sync_audio_rate callback.
With the callback, audio driver can trigger
i915 driver to set the proper N/CTS or N/M
based on different sample rates.
Signed-off-by: Libin Yang
---
include/drm/i915_component.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm
From: Libin Yang
HDMI audio may not work at some frequencies
with the HW provided N/CTS.
This patch sets the proper N value for the
given audio sample rate at the impacted frequencies.
At other frequencies, it will use the N/CTS value
which HW provides.
Signed-off-by: Libin Yang
---
drivers/g
On Sun, 26 Jul 2015, Uma Shankar wrote:
> From: Shashank Sharma
>
> SKL and BXT qualifies the HAS_DDI() check, and hence haswell
> modeset functions are re-used for modeset sequence. But DDI
> interface doesn't include support for DSI.
> This patch adds:
> 1. cases for DSI encoder, in those modes
On Sun, 26 Jul 2015, Uma Shankar wrote:
> From: Shashank Sharma
>
> This patch contains following changes:
> 1. MIPI device ready changes to support dsi_pre_enable. Changes
>are specific to BXT device ready sequence. Added check for
>ULPS mode(No effects on VLV).
> 2. Changes in dsi_enabl
From: "Thulasimani,Sivakumar"
These two patches together help detect DP displays on short pulse HPD
and pass the respective compliance test case (4.2.2.8)
Thulasimani,Sivakumar (2):
drm/i915: Read sink_count dpcd always for short hpd
drm/i915: Perform full detect on sink_count change
drive
From: "Thulasimani,Sivakumar"
This patch checks for changes in sink_count during short pulse hpd
in check_link_status and forces full detect when sink_count
changes. Compliance test 4.2.2.8 expects this behavior in
compliant driver.
Signed-off-by: Sivakumar Thulasimani
---
drivers/gpu/drm/i915
From: "Thulasimani,Sivakumar"
Compliance test 4.2.2.8 requires driver to read the sink_count for
short pulse interrupt even when the panel is not enabled.
This patch performs the following
a) reading sink_count by reusing intel_dp_detect_dpcd
instead of using intel_dp_get_dpcd
b) moving crtc enab
On Mon, Aug 17, 2015 at 07:49:41AM +0530, Deepak wrote:
>
>
> On 07/09/2015 02:15 AM, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > When fractional m2 divider isn't used on CHV the fractional part
> > is ignore by the hardware. Despite that, program the fractional
> > valu
On Sun, 26 Jul 2015, Uma Shankar wrote:
> From: Shashank Sharma
>
> BXT DSI clocks are different than previous platforms. So adding a
> new function to program following clocks and dividers:
> 1. Program variable divider to generate input to Tx clock divider
>(Output value must be < 39.5Mhz)
On Mon, Aug 17, 2015 at 09:46:01AM +0530, Deepak wrote:
>
>
> On 07/09/2015 02:15 AM, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Move the CHV clock buffer disable from chv_disable_pll() to the new
> > encoder .post_pll_disable() hook. This is more symmetric since the
>
On Sun, 26 Jul 2015, Uma Shankar wrote:
> From: Sunil Kamath
>
> Latest VBT mentions which set of registers will be used for BLC,
> as controller number field. Making use of this field in BXT
> BLC implementation. Also, the registers are used in case control
> pin indicates display DDI. Adding a
On Sun, 26 Jul 2015, Uma Shankar wrote:
> DSP CLK_GATE registers are specific to BYT and CHT.
> Avoid programming the same for BXT platform.
>
> v2: Rebased on latest drm nightly branch.
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/i915/intel_dsi.c |9 ++---
> 1 file changed, 6
On Mon, Aug 17, 2015 at 10:42:23AM +0200, Maarten Lankhorst wrote:
> Hey,
>
> Op 06-07-15 om 14:09 schreef ville.syrj...@linux.intel.com:
> > From: Ville Syrjälä
> >
> > While working on CHV DPIO powergating I relized DP .compute_config() was
> > clobbering lane_count etc. stored in intel_dp. Thi
On Sun, 26 Jul 2015, Uma Shankar wrote:
> DSI backlight support for bxt is added.
>
> TODO: There is no support for backlight control in drm panel
> framework. This will be added as part of VBT version patches
> fixing the backlight sequence.
>
> v2: Fixed Jani's review comments from p
On Mon, 17 Aug 2015, Sivakumar Thulasimani
wrote:
> From: "Thulasimani,Sivakumar"
>
> Compliance test 4.2.2.8 requires driver to read the sink_count for
> short pulse interrupt even when the panel is not enabled.
> This patch performs the following
> a) reading sink_count by reusing intel_dp_det
From: "Thulasimani,Sivakumar"
This patch removes 5.4Gbps from supported link rate for CHV since
it is not supported in it.
v2: change the ordering for better readability (Ville)
Signed-off-by: Sivakumar Thulasimani
---
drivers/gpu/drm/i915/intel_dp.c |7 ---
1 file changed, 4 insertio
From: "Thulasimani,Sivakumar"
This reverts
commit fe51bfb95c996733150c44d21e1c9f4b6322a326.
Author: Ville Syrjälä
Date: Thu Mar 12 17:10:38 2015 +0200
CHV does not support intermediate frequencies so reverting the
patch that added it in the first place
Signed-off-by: Sivakumar Thulasimani
-
From: "Thulasimani,Sivakumar"
This patch series cleans up the code to remove HBR2 support
for CHV since it is not supported on CHV. Also fixes a bug
for SKL platforms where HBR2 is not supported.
Thulasimani,Sivakumar (4):
Revert "drm/i915: Add eDP intermediate frequencies for CHV"
drm/i915:
From: "Thulasimani,Sivakumar"
This patch fixes the bug that SKL SKUs before B0 might return
HBR2 as supported even though it is not supposed to be enabled
on such platforms.
Signed-off-by: Sivakumar Thulasimani
---
drivers/gpu/drm/i915/intel_dp.c | 14 --
1 file changed, 8 insert
From: "Thulasimani,Sivakumar"
This patch removes TP3 support on CHV since there is no support
for HBR2 on this platform.
Signed-off-by: Sivakumar Thulasimani
---
drivers/gpu/drm/i915/intel_dp.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/driv
On Mon, 17 Aug 2015, libin.y...@intel.com wrote:
> From: Libin Yang
>
> HDMI audio may not work at some frequencies
> with the HW provided N/CTS.
>
> This patch sets the proper N value for the
> given audio sample rate at the impacted frequencies.
> At other frequencies, it will use the N/CTS valu
From: Ville Syrjälä
With MST the primary encoder doesn't have a crtc, so trying to dig out
the pipe config via that is going to explode. Insted pass the pipe
config in so that the MST code can pass in what it wants.
It's still a huge mess since the MST code recomputes the main link
parameters fo
On Mon, 17 Aug 2015, Sivakumar Thulasimani
wrote:
> From: "Thulasimani,Sivakumar"
>
> This patch removes TP3 support on CHV since there is no support
> for HBR2 on this platform.
>
> Signed-off-by: Sivakumar Thulasimani
> ---
> drivers/gpu/drm/i915/intel_dp.c | 24 +---
>
On Mon, 17 Aug 2015, Sivakumar Thulasimani
wrote:
> From: "Thulasimani,Sivakumar"
>
> This patch fixes the bug that SKL SKUs before B0 might return
> HBR2 as supported even though it is not supposed to be enabled
> on such platforms.
>
> Signed-off-by: Sivakumar Thulasimani
> ---
> drivers/gpu
On Mon, 17 Aug 2015 12:40:00 +0200,
libin.y...@intel.com wrote:
>
> From: Libin Yang
>
> For display audio, call the sync_audio_rate callback function
> to do the synchronization between gfx driver and audio driver.
>
> Signed-off-by: Libin Yang
I guess it would be easier to take this series
On Mon, Aug 17, 2015 at 05:45:11PM +0530, Sivakumar Thulasimani wrote:
> From: "Thulasimani,Sivakumar"
>
> This patch fixes the bug that SKL SKUs before B0 might return
> HBR2 as supported even though it is not supposed to be enabled
> on such platforms.
>
> Signed-off-by: Sivakumar Thulasimani
From: "Thulasimani,Sivakumar"
Compliance test 4.2.2.8 requires driver to read the sink_count for
short pulse interrupt even when the panel is not enabled.
This patch performs the following
a) reading sink_count by reusing intel_dp_detect_dpcd
instead of using intel_dp_get_dpcd
b) moving crtc enab
From: "Thulasimani,Sivakumar"
This patch checks for changes in sink_count during short pulse hpd
in check_link_status and forces full detect when sink_count
changes. Compliance test 4.2.2.8 expects this behavior in
compliant driver.
Signed-off-by: Sivakumar Thulasimani
---
drivers/gpu/drm/i915
From: "Thulasimani,Sivakumar"
These two patches together help detect DP displays on short pulse HPD
and pass the respective compliance test case (4.2.2.8)
Thulasimani,Sivakumar (2):
drm/i915: Read sink_count dpcd always for short hpd
drm/i915: Perform full detect on sink_count change
drive
On 08/17/2015 01:10 AM, Jonathan Corbet wrote:
> On Tue, 28 Jul 2015 16:45:15 -0300
> Danilo Cesar Lemes de Paula wrote:
>
>> Functions, Structs and Parameters definitions on kernel documentation
>> are pure cosmetic, it only highlights the element.
>>
>> To ease the navigation in the documentati
Hi Jani
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Monday, August 17, 2015 8:21 PM
> To: Yang, Libin; alsa-de...@alsa-project.org; ti...@suse.de; intel-
> g...@lists.freedesktop.org; daniel.vet...@ffwll.ch
> Cc: Yang, Libin
> Subject: Re: [PATCH v
Hi Takashi,
> -Original Message-
> From: Takashi Iwai [mailto:ti...@suse.de]
> Sent: Monday, August 17, 2015 8:26 PM
> To: Yang, Libin
> Cc: alsa-de...@alsa-project.org; intel-gfx@lists.freedesktop.org;
> daniel.vet...@ffwll.ch; jani.nik...@linux.intel.com
> Subject: Re: [PATCH v3 3/4] ALS
From: Ville Syrjälä
With MST there won't be a crtc assigned to the main link encoder, so
trying to dig up the pipe_config from there is a recipe for an oops.
Instead store the parameters (lane_count and link_rate) in the encoder,
and use those values during link training etc. Since those paramet
From: Ville Syrjälä
Set up the DDI->PLL mapping on SKL also for MST links. Might help make
MST operational on SKL.
Cc: Maarten Lankhorst
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c| 49 ++---
drivers/gpu/drm/i915/intel_dp_mst.c | 8 +-
Built sources are generated by "make all", so should be removed by "make
clean". This also ensures "distcleancheck" passes.
Signed-off-by: Thomas Wood
---
assembler/Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/assembler/Makefile.am b/assembler/Makefile.am
index
The current versions of these two macros don't work correctly if the
argument expression happens to contain a modulo operator (%) -- when
stringified, it gets interpreted as a printf formatting character!
With a specifically crafted parameter, this could probably cause a
kernel OOPS; consider WARN_
On Sat, 2015-08-15 at 17:17 -0500, Chris wrote:
> I'm still continuing to experience video lockups though not quite as
> frequent as before. The most recent was 12 August. I'm running the
> kernel as shown in my sig. I've attached my Xorg.0.log. I'm able to SSH
> into my desktop from my tablet and
On 13/08/15 18:17, Paulo Zanoni wrote:
If I have a program with the following:
igt_skip_on(i % 2 == 0);
igt_skip_on_f(i % 2 == 0, "i:%d\n", i);
igt_require(i % 2 == 0);
igt_require_f(i % 2 == 0, "i:%d\n", i);
then I'll get compiler error messages complaining about format
con
2015-08-17 13:30 GMT-03:00 Dave Gordon :
> The current versions of these two macros don't work correctly if the
> argument expression happens to contain a modulo operator (%) -- when
> stringified, it gets interpreted as a printf formatting character!
> With a specifically crafted parameter, this c
On Thu, Aug 13, 2015 at 04:11:00PM +0300, Mika Kuoppala wrote:
> Fix
>
> commit 59cdc16b1a6f069f944ff17851a59edf8f72d45d
> Author: Arun Siluvery
> Date: Fri Jul 31 16:27:07 2015 +0100
>
> tools/null_state/gen9: Send atleast one valid component in VF state
>
> to honor the Reviewed-by, sen
Em Sex, 2015-08-14 às 12:35 +0200, Thierry Reding escreveu:
> From: Thierry Reding
>
> The gtt.stolen_size field is of type size_t, and so should be printed
> using %zu to avoid build warnings on either 32-bit and 64-bit builds.
While the suggestion from Chris sounds good, this patch alone is
al
Add a header that includes all the headers for the library. This allows
reorganisation of the library without affecting programs using it and
also simplifies the headers that need to be included to use the library.
Signed-off-by: Thomas Wood
---
lib/igt.h | 49 ++
2015-08-12 12:44 GMT-03:00 :
> From: Ville Syrjälä
>
> Indent the PORTx_HOTPLUG_... defines appropriately, and fix some space
> vs. tab issues.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_reg.h | 72
> +
> 1 file changed, 37 insert
2015-08-12 12:44 GMT-03:00 :
> From: Ville Syrjälä
>
> Eliminate a bunch of duplicated code that calculates the currently
> enabled HPD interrupt bits.
Nice one! I see this one also depends on a patch that's not merged
yet, so I'm not sure if I should wait for it to be merged before
continuing t
On Aug 14 2015 or thereabouts, Stéphane Marchesin wrote:
> On Wed, Aug 5, 2015 at 12:34 PM, Benjamin Tissoires
> wrote:
> > On Jul 30 2015 or thereabouts, Sivakumar Thulasimani wrote:
> >>
> >>
> >> On 7/29/2015 8:52 PM, Benjamin Tissoires wrote:
> >> >On Jul 29 2015 or thereabouts, Sivakumar Thul
On 8/17/2015 5:39 PM, Jani Nikula wrote:
On Mon, 17 Aug 2015, Sivakumar Thulasimani
wrote:
From: "Thulasimani,Sivakumar"
Compliance test 4.2.2.8 requires driver to read the sink_count for
short pulse interrupt even when the panel is not enabled.
This patch performs the following
a) reading
On 8/17/2015 6:11 PM, Ville Syrjälä wrote:
On Mon, Aug 17, 2015 at 05:45:11PM +0530, Sivakumar Thulasimani wrote:
From: "Thulasimani,Sivakumar"
This patch fixes the bug that SKL SKUs before B0 might return
HBR2 as supported even though it is not supposed to be enabled
on such platforms.
Sig
From: "Thulasimani,Sivakumar"
This reverts
commit fe51bfb95c996733150c44d21e1c9f4b6322a326.
Author: Ville Syrjälä
Date: Thu Mar 12 17:10:38 2015 +0200
CHV does not support intermediate frequencies so reverting the
patch that added it in the first place
Reviewed-by: Ville Syrjälä
Signed-off-
From: "Thulasimani,Sivakumar"
This patch fixes the bug that SKL SKUs before B0 might return
HBR2 as supported even though it is not supposed to be enabled
on such platforms.
v2: optimize if else condition (Jani)
Reviewed-by: Ville Syrjälä
Signed-off-by: Sivakumar Thulasimani
---
drivers/gpu/
From: "Thulasimani,Sivakumar"
This patch removes 5.4Gbps from supported link rate for CHV since
it is not supported in it.
v2: change the ordering for better readability (Ville)
Reviewed-by: Ville Syrjälä
Signed-off-by: Sivakumar Thulasimani
---
drivers/gpu/drm/i915/intel_dp.c |7 ---
From: "Thulasimani,Sivakumar"
This patch removes TP3 support on CHV since there is no support
for HBR2 on this platform.
v2: rename the function to indicate it checks source rates (Jani)
Reviewed-by: Ville Syrjälä
Signed-off-by: Sivakumar Thulasimani
---
drivers/gpu/drm/i915/intel_dp.c | 2
From: "Thulasimani,Sivakumar"
This patch series cleans up the code to remove HBR2 support
for CHV since it is not supported on CHV. Also fixes a bug
for SKL platforms where HBR2 is not supported.
V2:
Added RB from Ville Syrjälä
patches 3 & 4 updated with comments from Jani.
Thulasimani,Siva
On 8/17/2015 5:59 PM, Jani Nikula wrote:
On Mon, 17 Aug 2015, Sivakumar Thulasimani
wrote:
From: "Thulasimani,Sivakumar"
This patch fixes the bug that SKL SKUs before B0 might return
HBR2 as supported even though it is not supposed to be enabled
on such platforms.
Signed-off-by: Sivakumar
On Tue, 18 Aug 2015, Sivakumar Thulasimani
wrote:
> From: "Thulasimani,Sivakumar"
>
> This patch removes TP3 support on CHV since there is no support
> for HBR2 on this platform.
>
> v2: rename the function to indicate it checks source rates (Jani)
>
> Reviewed-by: Ville Syrjälä
> Signed-off-by
From: Libin Yang
For display audio, call the sync_audio_rate callback function
to do the synchronization between gfx driver and audio driver.
Signed-off-by: Libin Yang
Reviewed-by: Takashi Iwai
---
sound/pci/hda/patch_hdmi.c | 19 +++
1 file changed, 19 insertions(+)
diff --g
From: Libin Yang
HDMI audio may not work at some frequencies
with the HW provided N/CTS.
This patch sets the proper N value for the
given audio sample rate at the impacted frequencies.
At other frequencies, it will use the N/CTS value
which HW provides.
Signed-off-by: Libin Yang
---
drivers/g
From: Libin Yang
Add the sync_audio_rate callback.
With the callback, audio driver can trigger
i915 driver to set the proper N/CTS or N/M
based on different sample rates.
Signed-off-by: Libin Yang
---
include/drm/i915_component.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/drm
From: Libin Yang
When modeset occurs and the TMDS frequency is set to some
speical values, the N/CTS need to be set manually if audio
is playing.
Signed-off-by: Libin Yang
---
drivers/gpu/drm/i915/i915_reg.h| 8
drivers/gpu/drm/i915/intel_audio.c | 40
On Mon, 17 Aug 2015, "Yang, Libin" wrote:
> Hi Jani
>
>> -Original Message-
>> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
>> Sent: Monday, August 17, 2015 8:21 PM
>> To: Yang, Libin; alsa-de...@alsa-project.org; ti...@suse.de; intel-
>> g...@lists.freedesktop.org; daniel.vet...
On 8/18/2015 12:14 PM, Jani Nikula wrote:
On Tue, 18 Aug 2015, Sivakumar Thulasimani
wrote:
From: "Thulasimani,Sivakumar"
This patch removes TP3 support on CHV since there is no support
for HBR2 on this platform.
v2: rename the function to indicate it checks source rates (Jani)
Reviewed-
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