From: Libin Yang
HDMI audio may not work at some frequencies
with the HW provided N/CTS.
This patch sets the proper N value for the
given audio sample rate at the impacted frequencies.
At other frequencies, it will use the N/CTS value
which HW provides.
Signed-off-by:
From: Libin Yang
When modeset occurs and the TMDS frequency is set to some
speical values, the N/CTS need to be set manually if audio
is playing.
Signed-off-by: Libin Yang
---
drivers/gpu/drm/i915/i915_reg.h| 8
From: Libin Yang
For display audio, call the sync_audio_rate callback function
to do the synchronization between gfx driver and audio driver.
Signed-off-by: Libin Yang
Reviewed-by: Takashi Iwai
---
sound/pci/hda/patch_hdmi.c | 19
From: Libin Yang
Add the sync_audio_rate callback.
With the callback, audio driver can trigger
i915 driver to set the proper N/CTS or N/M
based on different sample rates.
Signed-off-by: Libin Yang
---
include/drm/i915_component.h | 7 +++
1
From: Libin Yang
Add the kerneldoc for i915_audio_component in i915_component.h
Signed-off-by: Libin Yang
---
include/drm/i915_component.h | 39 ---
1 file changed, 24 insertions(+), 15 deletions(-)
diff --git
On Wed, 02 Sep 2015, libin.y...@intel.com wrote:
> From: Libin Yang
>
> HDMI audio may not work at some frequencies
> with the HW provided N/CTS.
>
> This patch sets the proper N value for the
> given audio sample rate at the impacted frequencies.
> At other frequencies, it
On Thu, Aug 27, 2015 at 05:32:10PM +0100, Dave Gordon wrote:
> On 18/08/15 22:32, yu@intel.com wrote:
> >From: Alex Dai
> >
> >The firmware layout changes that now it only has css header +
> >uCode + RSA signature. Plus, other trivial changes to support
> >GuC V4.3.
> >
>
On Wed, 02 Sep 2015, libin.y...@intel.com wrote:
> From: Libin Yang
>
> When modeset occurs and the TMDS frequency is set to some
> speical values, the N/CTS need to be set manually if audio
> is playing.
Do we still need this patch after David Henningsson's series [1]?
On Wed, Sep 02, 2015 at 10:03:55AM +0200, Takashi Iwai wrote:
> On Wed, 02 Sep 2015 10:00:44 +0200,
> Daniel Vetter wrote:
> >
> > On Fri, Aug 28, 2015 at 04:10:36PM +0300, Jani Nikula wrote:
> > > On Thu, 20 Aug 2015, Takashi Iwai wrote:
> > > > On Thu, 20 Aug 2015 11:41:42
On Wed, 02 Sep 2015, "Yang, Libin" wrote:
> Hi Jani,
>
>> -Original Message-
>> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
>> Sent: Wednesday, September 02, 2015 3:52 PM
>> To: Yang, Libin; alsa-de...@alsa-project.org; ti...@suse.de; intel-
>>
On Thu, Aug 27, 2015 at 02:46:26PM +0530, Sharma, Shashank wrote:
> Regards
> Shashank
>
> On 8/26/2015 8:47 PM, Daniel Vetter wrote:
> >On Wed, Aug 26, 2015 at 10:05:00AM +, Jindal, Sonika wrote:
> >>HPD bits control the interrupt but the live status (with some monitors)
> >>takes time to
On Thu, Aug 27, 2015 at 02:18:32PM +0530, Sivakumar Thulasimani wrote:
> From: "Thulasimani,Sivakumar"
>
> This patch checks for changes in sink count between short pulse
> hpds and forces full detect when there is a change.
>
> This will allow both detection of
On Tue, Sep 01, 2015 at 01:51:38PM +0200, Maarten Lankhorst wrote:
> Op 01-09-15 om 12:12 schreef Daniel Vetter:
> > On Mon, Aug 31, 2015 at 03:13:41PM -0700, Matt Roper wrote:
> >> On Thu, Aug 27, 2015 at 03:15:15PM +0200, Maarten Lankhorst wrote:
> >>> Set DRIVER_MODESET and DRIVER_ATOMIC by
On Thu, Aug 27, 2015 at 01:44:06AM +, Konduru, Chandra wrote:
> > > -static char intel_get_stepping(struct drm_device *dev)
> > > +char intel_get_stepping(struct drm_device *dev)
> >
> > I guess we should have a new home for this now that it's used outside of
> > intel_csr.c Plus kerneldoc,
On Thu, Aug 27, 2015 at 10:28:49AM +0800, Zhiyuan Lv wrote:
> Hi Danie,
>
> On Wed, Aug 26, 2015 at 10:47:37AM +0200, Daniel Vetter wrote:
> > On Thu, Aug 20, 2015 at 01:57:13PM +0300, Joonas Lahtinen wrote:
> > > On to, 2015-08-20 at 15:45 +0800, Zhiyuan Lv wrote:
> > > > The full ppgtt is
On Thu, Aug 27, 2015 at 10:49:28AM +0800, Zhiyuan Lv wrote:
> Hi Daniel,
>
> On Wed, Aug 26, 2015 at 10:50:23AM +0200, Daniel Vetter wrote:
> > > > @@ -332,6 +332,12 @@ int i915_gem_context_init(struct drm_device
> > > > *dev)
> > > > if (WARN_ON(dev_priv->ring[RCS].default_context))
> >
On Mon, Aug 31, 2015 at 05:08:36PM +0530, Salonie, Namrta wrote:
> Hi Chris, Daniel.
>
> Thanks for your inputs.
> I agree that we need to amend the patch. Will do following changes.
> 1.RPM ref count is not needed with immediate enabling of RC6, I will
> remove
> that.
> 2.I will extend
Hi Jani,
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Wednesday, September 02, 2015 4:20 PM
> To: Yang, Libin; alsa-de...@alsa-project.org; ti...@suse.de; intel-
> g...@lists.freedesktop.org; daniel.vet...@ffwll.ch;
> ville.syrj...@linux.intel.com
On Wed, Aug 26, 2015 at 07:40:54PM +0530, Animesh Manna wrote:
>
>
> On 8/26/2015 6:40 PM, Daniel Vetter wrote:
> >On Wed, Aug 26, 2015 at 01:36:05AM +0530, Animesh Manna wrote:
> >>Dmc will restore the csr program except DC9, cold boot,
> >>warm reset, PCI function level reset, and
On Tue, Sep 01, 2015 at 01:16:49PM +0300, Jani Nikula wrote:
> On Thu, 27 Aug 2015, Sivakumar Thulasimani
> wrote:
> > From: "Thulasimani,Sivakumar"
> >
> > Compliance requires the driver to read dpcd register 0 to 12 and
> >
On Thu, Aug 27, 2015 at 01:58:09PM +0200, Maarten Lankhorst wrote:
> This will make sure we get a lockdep spat in all cases
> even if the context is a complete garbage pointer.
>
> Signed-off-by: Maarten Lankhorst
Applied to drm-misc, thanks.
-Daniel
> ---
>
On Thu, Aug 27, 2015 at 12:47:30PM -0700, O'Rourke, Tom wrote:
> On Tue, Aug 18, 2015 at 02:34:47PM -0700, yu@intel.com wrote:
> > From: Alex Dai
> >
> > If rc6 is enabled, notify GuC so it can do proper forcewake before
> > command submission.
> >
> > Signed-off-by: Alex
On Fri, Aug 28, 2015 at 04:10:36PM +0300, Jani Nikula wrote:
> On Thu, 20 Aug 2015, Takashi Iwai wrote:
> > On Thu, 20 Aug 2015 11:41:42 +0200,
> > David Henningsson wrote:
> >>
> >>
> >>
> >> On 2015-08-20 11:28, Takashi Iwai wrote:
> >> > On Wed, 19 Aug 2015 10:48:58 +0200,
>
On Thu, Aug 27, 2015 at 09:50:03AM +0800, Zhiyuan Lv wrote:
> Hi Daniel,
>
> On Wed, Aug 26, 2015 at 10:56:00AM +0200, Daniel Vetter wrote:
> > On Tue, Aug 25, 2015 at 08:17:05AM +0800, Zhiyuan Lv wrote:
> > > Hi Chris,
> > >
> > > On Mon, Aug 24, 2015 at 11:23:13AM +0100, Chris Wilson wrote:
>
This removes the need to separately track fb changes i915.
That will be done as a separate commit, however.
Changes since v1:
- Add dri-devel to cc.
- Fix a check in intel's prepare and cleanup fb to take rotation
into account.
Changes since v2:
- Split out i915 changes to a separate commit.
atomic->disabled_planes is a hack that had to exist because
prepare_fb was only called when a new fb was set. This messed
up fb tracking in some circumstances like aborts from
interruptible waits. As a result interruptible waiting in
prepare_plane_fb was forbidden, but other errors could still
On Wed, 02 Sep 2015, "Yang, Libin" wrote:
> Hi Jani,
>
>> -Original Message-
>> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
>> Sent: Wednesday, September 02, 2015 4:20 PM
>> To: Yang, Libin; alsa-de...@alsa-project.org; ti...@suse.de; intel-
>>
On Mon, Aug 31, 2015 at 01:03:03AM +, Hindman, Gavin wrote:
> Unless I'm misreading that would imply that we are moving away from our
> previous position that DMC FW is optional, correct?Would this not
> render power-sequencing broken if a distro chose not to include DMC FW?
For upstream
On Mon, Aug 31, 2015 at 03:33:13PM +0100, Chris Wilson wrote:
> On Mon, Aug 31, 2015 at 05:23:27PM +0300, Jani Nikula wrote:
> > On Thu, 27 Aug 2015, Jani Nikula wrote:
> > > On Thu, 27 Aug 2015, Chris Wilson wrote:
> > >> On Thu, Aug 27, 2015 at
On Tue, Sep 01, 2015 at 02:03:34PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 01, 2015 at 12:07:01PM +0200, Daniel Vetter wrote:
> > On Fri, Aug 28, 2015 at 11:50:08AM -0300, Paulo Zanoni wrote:
> > > 2015-08-28 11:20 GMT-03:00 Ville Syrjälä :
> > > > On Fri, Aug 14,
On Wed, 02 Sep 2015 10:00:44 +0200,
Daniel Vetter wrote:
>
> On Fri, Aug 28, 2015 at 04:10:36PM +0300, Jani Nikula wrote:
> > On Thu, 20 Aug 2015, Takashi Iwai wrote:
> > > On Thu, 20 Aug 2015 11:41:42 +0200,
> > > David Henningsson wrote:
> > >>
> > >>
> > >>
> > >> On
On Thu, Aug 27, 2015 at 01:51:52AM +, Konduru, Chandra wrote:
> > > +static void test_nv12_invalid_fb_params(data_t *d)
> > > +{
> > > + igt_display_t *display = >display;
> > > + igt_output_t *output;
> > > + enum pipe pipe;
> > > + int valid_tests = 0;
> > > +
> > > +
Hi Jani,
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Wednesday, September 02, 2015 3:52 PM
> To: Yang, Libin; alsa-de...@alsa-project.org; ti...@suse.de; intel-
> g...@lists.freedesktop.org; daniel.vet...@ffwll.ch;
> ville.syrj...@linux.intel.com
Hi Jani,
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Wednesday, September 02, 2015 4:42 PM
> To: Yang, Libin; alsa-de...@alsa-project.org; ti...@suse.de; intel-
> g...@lists.freedesktop.org; daniel.vet...@ffwll.ch;
>
On Wed, Aug 26, 2015 at 02:22:13PM -0700, Clint Taylor wrote:
> On 08/26/2015 12:58 AM, Jani Nikula wrote:
> >Make it available outside of intel_dp.c.
> >
> >Signed-off-by: Jani Nikula
> >---
> > drivers/gpu/drm/i915/intel_display.c | 33 +
>
On Thu, Aug 27, 2015 at 12:08:30PM +0200, Maarten Lankhorst wrote:
> This appears to make all the cursor tests really slow because of the many
> calls to skl_update_wm
> when the cursor plane visibility is changed. It performs does 3 vblanks each
> time it's called, and
> it's probably called
On Wed, 02 Sep 2015, libin.y...@intel.com wrote:
> From: Libin Yang
>
> Add the sync_audio_rate callback.
>
> With the callback, audio driver can trigger
> i915 driver to set the proper N/CTS or N/M
> based on different sample rates.
>
> Signed-off-by: Libin Yang
On Wed, Sep 02, 2015 at 05:14:35PM +0300, Jani Nikula wrote:
> On Wed, 02 Sep 2015, Graham Whaley wrote:
> > Documentation/DocBook/drm.tmpl | 925
> > +
> > drivers/gpu/drm/drm_crtc.c | 16 +
> > 2 files changed, 17
Daniel Vetter writes:
> On Wed, Sep 02, 2015 at 04:19:00PM +0200, Egbert Eich wrote:
>
> Hm I missed that this same register is also accessed by the irq handler
> code, and it's not just that touching these bits can cause interrupts. So
> yeah we need your patch, but it needs to be clearer
On Wed, Sep 02, 2015 at 04:22:56PM +0200, Maarten Lankhorst wrote:
> Op 02-09-15 om 13:15 schreef Ville Syrjälä:
> > On Wed, Sep 02, 2015 at 01:08:31PM +0200, Maarten Lankhorst wrote:
> >> Op 02-09-15 om 12:35 schreef Ville Syrjälä:
> >>> On Wed, Sep 02, 2015 at 07:15:25AM +0200, Maarten Lankhorst
On Fri, Aug 28, 2015 at 07:15:15PM -0300, Paulo Zanoni wrote:
> 2015-08-28 16:59 GMT-03:00 :
> > From: Ville Syrjälä
> >
> > On GMCH plaforms we are now getting the following spew on aux
> > interrupts:
> > [drm:intel_get_hpd_pins]
On Wed, Sep 02, 2015 at 03:46:40PM +0200, Takashi Iwai wrote:
> On Wed, 02 Sep 2015 15:44:34 +0200,
> Jani Nikula wrote:
> >
> > On Wed, 02 Sep 2015, Takashi Iwai wrote:
> > > On Wed, 02 Sep 2015 11:02:42 +0200,
> > > Jani Nikula wrote:
> > >>
> > >> >> Nitpick. I'd prefer some
On Wed, 02 Sep 2015 17:22:01 +0200,
Daniel Vetter wrote:
>
> On Wed, Sep 02, 2015 at 03:46:40PM +0200, Takashi Iwai wrote:
> > On Wed, 02 Sep 2015 15:44:34 +0200,
> > Jani Nikula wrote:
> > >
> > > On Wed, 02 Sep 2015, Takashi Iwai wrote:
> > > > On Wed, 02 Sep 2015 11:02:42
On each call to gen8_alloc_va_range_3lvl we're allocating temporary
bitmaps needed for error handling. Unfortunately, when we increase
address space size (48b ppgtt) we do additional (512 - 4) calls to
kcalloc, increasing latency between exec and actual start of execution
on the GPU. Let's just do
On Wed, Sep 02, 2015 at 06:36:35PM +0300, Imre Deak wrote:
> These registers exist only before GEN5, so currently we may access
> undefined registers on VLV/CHV and BXT. Apply the workaround only pre
> GEN5.
>
> This triggered an unclaimed register access warning on BXT.
>
> Signed-off-by: Imre
On 02/09/2015 16:47, Łukasz Daniluk wrote:
Added checks for available slices, subslices and EUs for Broadwell. This
information is filled in intel_device_info and is available to user with
GET_PARAM.
Added checks for enabled slices, subslices and EU for Broadwell. This
information is based on
On Wed, Sep 02, 2015 at 02:46:41PM +0100, Chris Wilson wrote:
> On Wed, Sep 02, 2015 at 02:40:03PM +0100, Michel Thierry wrote:
> > On 9/1/2015 10:06 AM, Michał Winiarski wrote:
> > >On each call to gen8_alloc_va_range_3lvl we're allocating temporary
> > >bitmaps needed for error handling.
On Wed, 2015-09-02 at 18:16 +0700, David Ho wrote:
> Dear Rodrigo,
Hi David,
I just paid attention to the subject and notice you are looking for
driver for GMA 3150. I'm not sure, but I'm afraid this platform doesn't
have the GPU supported by our open source driver.
Probably the GMA 3150 will
On Wed, Sep 02, 2015 at 02:50:52PM +0100, Graham Whaley wrote:
> (RFC/test - not for merging)
> The below is a test of moving the large HTML KMS properties table out
> to markdown style in the appropriate files.
> In the test we only use the first few rows of the existing KMS table
> an example.
>
On Wed, Sep 02, 2015 at 03:36:33PM +0100, Daniel Stone wrote:
> On 2 September 2015 at 09:42, Maarten Lankhorst
> wrote:
> > This removes the need to separately track fb changes i915.
> > That will be done as a separate commit, however.
> >
> > Changes since v1:
On Wed, Sep 02, 2015 at 05:13:29PM +0200, Daniel Vetter wrote:
> On Wed, Sep 02, 2015 at 02:46:41PM +0100, Chris Wilson wrote:
> > On Wed, Sep 02, 2015 at 02:40:03PM +0100, Michel Thierry wrote:
> > > On 9/1/2015 10:06 AM, Michał Winiarski wrote:
> > > >On each call to gen8_alloc_va_range_3lvl
These registers exist only before GEN5, so currently we may access
undefined registers on VLV/CHV and BXT. Apply the workaround only pre
GEN5.
This triggered an unclaimed register access warning on BXT.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_bios.c | 2 +-
On Wed, Sep 02, 2015 at 05:46:38PM +0200, Michał Winiarski wrote:
> + pts = kcalloc(pdpes * BITS_TO_LONGS(I915_PDES),
> + sizeof(unsigned long), GFP_TEMPORARY);
> + if (!pts)
> + goto err_out;
This is the oddly aligned bracket!
-Chris
--
Chris Wilson,
Damien,
You reviewed v1 and then went on vacation for v2. Any chance you can
review v2?
Thanks,
Bob
On Tue, 21 Jul 2015 10:42:53 -0700
Bob Paauwe wrote:
> Clearing the watermarks for all pipes/planes when updating the
> watermarks for a single CRTC change seems like
On Wed, Sep 02, 2015 at 08:20:52PM +, Zanoni, Paulo R wrote:
> Em Qua, 2015-08-26 às 08:44 +0100, Chris Wilson escreveu:
> > On Tue, Aug 25, 2015 at 07:03:42PM -0300, Paulo Zanoni wrote:
> > > The unclaimed register bit is only triggered when someone touches
> > > the
> > > specified register
On Wed, Sep 2, 2015 at 10:37 AM, Vivi, Rodrigo wrote:
> On Wed, 2015-09-02 at 18:16 +0700, David Ho wrote:
>> Dear Rodrigo,
>
> Hi David,
>
> I just paid attention to the subject and notice you are looking for
> driver for GMA 3150. I'm not sure, but I'm afraid this
m/atomic: Make prepare_fb/cleanup_fb only take state, v3")
Well, that was clearly never build tested :-(
I have used the drm-misc tree from next-20150902 for today.
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
___
Intel-gfx
On Wed, 2015-09-02 at 18:09 -0700, Matt Turner wrote:
> On Wed, Sep 2, 2015 at 10:37 AM, Vivi, Rodrigo <
> rodrigo.v...@intel.com> wrote:
> > On Wed, 2015-09-02 at 18:16 +0700, David Ho wrote:
> > > Dear Rodrigo,
> >
> > Hi David,
> >
> > I just paid attention to the subject and notice you are
On Wed, Sep 2, 2015 at 9:01 PM, David Ho wrote:
> Dear Rodrigo,
>
> Thank you for your help.
>
> I'll take a look at the PCI ID.
>
> However,
> when I search GMA 3150 at 01.org, I came across this page:
>
Dear Rodrigo,
Thank you for your help.
I'll take a look at the PCI ID.
However,
when I search GMA 3150 at 01.org, I came across this page:
https://01.org/linuxgraphics/downloads/2013q1-intel-graphics-stack-release
and also this page at Intel.com
The following commit was bisected and tested to be the first bad commit which
causes the warning as seen below at a ThinkPad T40s:
commit a1b2278e4dfcd2dbea85e319ebf73a6b7b2f180b
Author: Chandra Konduru
Date: Tue Apr 7 15:28:45 2015 -0700
drm/i915: skylake
Em Qua, 2015-08-26 às 08:44 +0100, Chris Wilson escreveu:
> On Tue, Aug 25, 2015 at 07:03:42PM -0300, Paulo Zanoni wrote:
> > The unclaimed register bit is only triggered when someone touches
> > the
> > specified register range.
> >
> > For the normal use case (with i915.mmio_debug=0), this
>> Sep 2 18:10:26 t44 kernel: [drm:check_crtc_state [i915]] *ERROR* mismatch
>> in ips_enabled (expected 1, found 0)
It is due to ips_enabled mismatch in crtc_state.
I can't think how below patch is triggering mismatch in ips_enabled.
> -Original Message-
> From: Toralf Förster
2015-09-02 17:53 GMT-03:00 ch...@chris-wilson.co.uk :
> On Wed, Sep 02, 2015 at 08:20:52PM +, Zanoni, Paulo R wrote:
>> Em Qua, 2015-08-26 às 08:44 +0100, Chris Wilson escreveu:
>> > On Tue, Aug 25, 2015 at 07:03:42PM -0300, Paulo Zanoni wrote:
>> > > The unclaimed
Hi all,
We suspect watermark has problem in kernel 3.14,
Does anyone have a new watermark patch for 3.14 similar as below patch:
http://patchwork.freedesktop.org/bundle/anderco/matt-watermarks/
Thanks
William
___
Intel-gfx mailing list
From: Alex Dai
Bit 16 of GuC status indicates resuming from RC6. The LAPIC_DONE
status is a reliable readiness flag only when resuming from RC6.
This fix a racing issue that allocation of doorbell fails whilst
GuC init is not finished.
Signed-off-by: Alex Dai
Unless future specs tells otherwise we can assume future gens
inherit some stuff from the previous so let's handle
missed cases when we know tehy should't be there and assume
default equals newest one.
No functional changes.
Signed-off-by: Rodrigo Vivi
---
These functions are already being called for gen >= 9,
so let's be sure when this happens we use whatever is
there already for the latest platform.
No functional change.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_irq.c | 8
1 file changed, 4
This is another case where we can consider the default is the
newest available and not actually a missed case.
No functional change.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_display.c | 18 ++
1 file changed, 6 insertions(+), 12
Hi all,
Can anyone educate me if water mark update need to wait for next VSYNC?
In other words, if we flip a frame to overlay for the first time,
it will be showed in the next VBlank as water mark update needs to wait for
that?
Is this true or a bug?
Thanks
William
From: Alex Dai
By using information from GuC css header, we can eliminate some
hard code w.r.t size of some components of firmware.
Signed-off-by: Alex Dai
---
drivers/gpu/drm/i915/intel_guc.h| 2 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 36
2015-09-02 17:53 GMT-03:00 ch...@chris-wilson.co.uk :
> On Wed, Sep 02, 2015 at 08:20:52PM +, Zanoni, Paulo R wrote:
>> Em Qua, 2015-08-26 às 08:44 +0100, Chris Wilson escreveu:
>> > On Tue, Aug 25, 2015 at 07:03:42PM -0300, Paulo Zanoni wrote:
>> > > The unclaimed
Op 02-09-15 om 12:35 schreef Ville Syrjälä:
> On Wed, Sep 02, 2015 at 07:15:25AM +0200, Maarten Lankhorst wrote:
>> Op 01-09-15 om 17:48 schreef Ville Syrjälä:
>>> On Tue, Sep 01, 2015 at 08:30:05AM -0700, Matt Roper wrote:
On Tue, Sep 01, 2015 at 07:24:19AM +0200, Maarten Lankhorst wrote:
Fixes regression from
commit f1afe24f0e736b9d7f2275e2b1504af3fe612f2a
Author: Arun Siluvery
Date: Tue Aug 4 16:22:20 2015 +0100
drm/i915: Change SRM, LRM instructions to use correct length
which forgot to account for the length bias when declaring the fixed
Patch "drm/i915: Use expcitly fixed type in compat32 structs" changed the type
of param field in drm_i915_getparam from int to s32. This header is exported to
userspace and needs to use userspace type __s32 instead.
This fixes userspace compilation errors like the following:
On Fri, Aug 28, 2015 at 07:02:27PM +0200, David Henningsson wrote:
> This callback will be called by the i915 driver to notify the hda
> driver that its HDMI information needs to be refreshed, i e,
> that audio output is now available (or unavailable) - usually as a
> result of a monitor being
On Mon, Aug 31, 2015 at 02:35:32PM +0530, Sonika Jindal wrote:
> From: Durgadoss R
>
> Currently, HDMI hotplug with eDP as local panel is failing
> because the HDMI hpd is detected as a long hpd for eDP; and is
> thus rightfully ignored. But, it should really be handled as
On Wed, Sep 02, 2015 at 01:41:18PM +0200, Artem Savkov wrote:
> Patch "drm/i915: Use expcitly fixed type in compat32 structs" changed the type
> of param field in drm_i915_getparam from int to s32. This header is exported
> to
> userspace and needs to use userspace type __s32 instead.
>
> This
On Mon, Aug 31, 2015 at 03:10:39PM +0100, Chris Wilson wrote:
> There have been many hard to track down bugs whereby userspace forgot to
> flag a write buffer and then cause graphics corruption or a hung GPU
> when that buffer was later purged under memory pressure (as the buffer
> appeared clean,
On Tue, Sep 01, 2015 at 10:21:33PM +0200, Egbert Eich wrote:
> drm_kms_helper_poll_enable() is called from a context in
> intel_hpd_irq_storm_disable() where the the mode_config mutex is
> already locked.
> When this function was converted to lock this mutex in:
>
> commit
When hpd occurs on port_b, due to the below assignment, it calls
digital_port_wok_func first.
There it tries to check the connector status for port B (actually checking port
A's HPD pin due to the BXT WA).
It finds it connected and continues to read the dpcd. Since this port was only
On Wed, 02 Sep 2015 13:45:03 +0200,
Daniel Vetter wrote:
>
> On Fri, Aug 28, 2015 at 08:14:48PM +0300, Jani Nikula wrote:
> > On Fri, 28 Aug 2015, David Henningsson
> > wrote:
> > > Hopefully last version? :-)
> > >
> > > * Added commit text about duplicate
Dear Rodrigo,
Is it possible to obtain the "raw" driver and to install it manually, without
installing it through the Installer?
Regards,
David
-Original Message-
From: Vivi, Rodrigo [mailto:rodrigo.v...@intel.com]
Sent: 01 September 2015 23:04
To: intel-gfx@lists.freedesktop.org;
On Wed, Sep 02, 2015 at 01:08:31PM +0200, Maarten Lankhorst wrote:
> Op 02-09-15 om 12:35 schreef Ville Syrjälä:
> > On Wed, Sep 02, 2015 at 07:15:25AM +0200, Maarten Lankhorst wrote:
> >> Op 01-09-15 om 17:48 schreef Ville Syrjälä:
> >>> On Tue, Sep 01, 2015 at 08:30:05AM -0700, Matt Roper wrote:
On 20/08/2015 16:27, Chris Wilson wrote:
On Thu, Aug 20, 2015 at 05:34:59PM +0300, Mika Kuoppala wrote:
If we leave the last_retired_head to pre-reset value, we might
end up in a situation where intel_ring_space() returns wrong
value on next hardware init.
On Fri, Aug 28, 2015 at 08:14:48PM +0300, Jani Nikula wrote:
> On Fri, 28 Aug 2015, David Henningsson
> wrote:
> > Hopefully last version? :-)
> >
> > * Added commit text about duplicate events (patch 4/4)
> > * Added locks in bind/unbind on i915 side (patch
Hi Dave -
i915 display fixes headed for v4.3. Mostly SKL, but some regression
fixes too.
BR,
Jani.
The following changes since commit 26951caf55d73ceb1967b0bf12f6d0b96853508e:
drm/i915/skl: enable DDI-E hotplug (2015-08-26 10:24:25 +0300)
are available in the git repository at:
:( This had a hole..
Please drop this patch..
I am going to send another patch tested with hdmi optimization series for bxt.
Regards,
Sonika
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
Sent: Wednesday, September 2, 2015 5:17 PM
To:
On Tue, Sep 01, 2015 at 12:15:33PM +0200, Maarten Lankhorst wrote:
> This makes the error message slightly more useful.
>
> Changes since v1:
> - Use ktime_get() while irqs are still disabled. (vsyrjala)
>
> Signed-off-by: Maarten Lankhorst
> Reviewed-by:
On Wed, Sep 02, 2015 at 11:48:36AM +, Jindal, Sonika wrote:
> :( This had a hole..
> Please drop this patch..
What kind of hole? It sounds like we need this to avoid blowing up when we
handle the edp hpd interrupt everywhere? Please explain so I can
understand what I've missed here ...
On Tue, Sep 01, 2015 at 10:21:32PM +0200, Egbert Eich wrote:
> drm_kms_helper_poll_enable() was converted to lock the mode_config
> mutex in commit 8c4ccc4ab6f64e859d4ff8d7c02c2ed2e956e07f
> ("drm/probe-helper: Grab mode_config.mutex in poll_init/enable").
>
> This disregarded the cases where
On Tue, Sep 01, 2015 at 10:21:34PM +0200, Egbert Eich wrote:
> This copy-and-past error was introduced in:
>
> commit fd63e2a972c670887e5e8a08440111d3812c0996
> Author: Imre Deak
> Date: Tue Jul 21 15:32:44 2015 -0700
>
> drm/i915: combine i9xx_get_hpd_pins and
On Wed, Sep 02, 2015 at 05:20:34PM +0800, Zhiyuan Lv wrote:
> Hi Daniel,
>
> Thanks for the comments! And my reply in line:
>
> On Wed, Sep 02, 2015 at 10:19:03AM +0200, Daniel Vetter wrote:
> > > >
> > > > Also you obviously have to complete the copying from shadow->guest ctx
> > > > before
On Tue, Sep 01, 2015 at 10:21:35PM +0200, Egbert Eich wrote:
> A HPD interrupt may fire during intel_crt_detect_hotplug() - especially
> when HPD interrupt storms occur.
> Since the interrupt handler changes the enabled interrupt lines when it
> detects a storm this races with
On Wed, 02 Sep 2015, Daniel Vetter wrote:
> On Wed, Sep 02, 2015 at 02:52:19PM +0300, Ville Syrjälä wrote:
>> On Wed, Sep 02, 2015 at 01:41:18PM +0200, Artem Savkov wrote:
>> > Patch "drm/i915: Use expcitly fixed type in compat32 structs" changed the
>> > type
>> > of param
On Wed, 02 Sep 2015 11:02:42 +0200,
Jani Nikula wrote:
>
> >> Nitpick. I'd prefer some sharing with the similar blocks from the
> >> earlier patch. Also a debug message on n == 0 would be nice; you
> >> probably didn't notice your audio_config_get_rate() wasn't working
> >> right
> >> because
On Wed, 02 Sep 2015, Imre Deak wrote:
> On ke, 2015-09-02 at 14:00 +0200, Daniel Vetter wrote:
>> On Tue, Sep 01, 2015 at 10:21:34PM +0200, Egbert Eich wrote:
>> > This copy-and-past error was introduced in:
>> >
>> > commit fd63e2a972c670887e5e8a08440111d3812c0996
>> >
On 9/1/2015 10:06 AM, Michał Winiarski wrote:
On each call to gen8_alloc_va_range_3lvl we're allocating temporary
bitmaps needed for error handling. Unfortunately, when we increase
address space size (48b ppgtt) we do additional (512 - 4) calls to
kcalloc, increasing latency between exec and
On Wed, 02 Sep 2015, Takashi Iwai wrote:
> On Wed, 02 Sep 2015 11:02:42 +0200,
> Jani Nikula wrote:
>>
>> >> Nitpick. I'd prefer some sharing with the similar blocks from the
>> >> earlier patch. Also a debug message on n == 0 would be nice; you
>> >> probably didn't notice your
On Wed, 02 Sep 2015 15:44:34 +0200,
Jani Nikula wrote:
>
> On Wed, 02 Sep 2015, Takashi Iwai wrote:
> > On Wed, 02 Sep 2015 11:02:42 +0200,
> > Jani Nikula wrote:
> >>
> >> >> Nitpick. I'd prefer some sharing with the similar blocks from the
> >> >> earlier patch. Also a debug
1 - 100 of 131 matches
Mail list logo