Gentle reminder for review.
Thanks
Sagar
On 8/23/2015 5:52 PM, Sagar Arun Kamble wrote:
Disable Turbo on steppings prior to B0 on BXT due to hangs seen during GT CPD
exit.
Change-Id: I50c5c03f59f5ba092db19e17234951d89db42c6c
Signed-off-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_p
Hi Alex,
Kindly review this patch.
Thanks
Sagar
On 8/23/2015 5:52 PM, Sagar Arun Kamble wrote:
WaRsDisableCoarsePowerGating: Coarse Power Gating (CPG) needs to be
disabled for platforms prior to BXT B0 and till SKL E0.
Change-Id: Ia3c4c16e050c88d3e259f601054875c812d69c3a
Signed-off-by: Sagar
CABC stands for the Content Adaptive Backlight Control.
In the normal display the backlight which we see is due to the
backlight which is being modulated by the filter, which is inturn
dependent on the image. In brief the CABC does the histogram
analysis of the image and then controls the filter an
In CABC (Content Adaptive Brightness Control) content grey level
scale can be increased while simultaneously decreasing
brightness of the backlight to achieve same perceived brightness.
The CABC is not standardized and panel vendors are free to follow
their implementation. The CABC implementaion h
For dual link panel scenarios there are new fileds added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.
v2: Rebase
v3: Rebase
Signed-off-by: Deepak M
---
drivers/gpu/drm/i915/intel_bios.c | 13 +
drivers/gpu/drm/i915/intel_bios.h |
Hi
On Thu, Sep 10, 2015 at 10:39 PM, Daniel Vetter wrote:
> It's completely unused and there's really no reason for this:
> - drm_framebuffer structures are invariant after creation, no need for
> helpers to manipulate them.
> - drm_framebuffer structures should just be embedded (and that's wha
From: Libin Yang
When modeset occurs and the TMDS frequency is set to some
speical values, the N/CTS need to be set manually if audio
is playing.
Signed-off-by: Libin Yang
---
drivers/gpu/drm/i915/intel_audio.c | 56 --
include/drm/i915_component.h | 1
From: Alex Dai
By using information from GuC css header, we can eliminate some
hard code w.r.t size of some components of firmware.
v1: 1) guc_css_header is defined as __packed now
2) Add and correct GuC related topics in kernel/Doc
Signed-off-by: Alex Dai
---
Documentation/DocBook/drm.tm
From: Alex Dai
Add host2guc interfaces to nofigy GuC power state changes when
enter or resume from power saving state.
Signed-off-by: Alex Dai
---
drivers/gpu/drm/i915/i915_drv.c| 1 +
drivers/gpu/drm/i915/i915_gem.c| 1 +
drivers/gpu/drm/i915/i915_guc_submission.c |
From: Dave Gordon
This is to enable command submission via GuC.
Signed-off-by: Dave Gordon
---
drivers/gpu/drm/i915/i915_params.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 05053e2..a509
From: Alex Dai
The first two had been submitted to upstream. They are collected here as a
summry of latest GuC changes.
drm/i915/guc: Fix a bug in GuC status check
drm/i915/guc: Add GuC css header parser
The others are
From: Alex Dai
GuC expects two bits for Render and Media domain separately when
driver sends data via host2guc SAMPLE_FORCEWAKE. Bit 0 is for
Render and bit 1 is for Media domain.
Signed-off-by: Alex Dai
---
drivers/gpu/drm/i915/i915_guc_submission.c | 3 ++-
1 file changed, 2 insertions(+), 1
From: Alex Dai
Bit 16 of GuC status indicates resuming from RC6. The LAPIC_DONE
status is a reliable readiness flag only when resuming from RC6.
This fix a racing issue that allocation of doorbell fails whilst
GuC init is not finished.
Signed-off-by: Alex Dai
---
drivers/gpu/drm/i915/i915_guc_
From: Sagar Arun Kamble
Due to flip interrupts GuC stays awake always and GT does not enter RC6.
Do not route those interrupts to GuC for now.
Signed-off-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_guc_loader.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --g
If on one multiboot machine:
video=1440x900@60 on kernel cmdline
and in startup script
xrandr --dpi 108 --output DP1 --mode 1680x1050 # intel digital
and
default/init level = multi-user.target
and
connection between PC and display is standard DisplayPort cable
and
openSUSE 13.2 i586
then startx bli
On Thu, Sep 10, 2015 at 02:57:32PM -0700, Jesse Barnes wrote:
> On 09/10/2015 02:53 PM, Ville Syrjälä wrote:
> > On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote:
> >> On HSW at least (still testing other platforms, but should be harmless
> >> elsewhere), the DSL reg reads back as 0 whe
Agree. The LRC prefix is confusing. Thanks for the patch. -Alex
On 09/10/2015 02:58 PM, Jesse Barnes wrote:
That looks like it would, but I think it's still confusing to reference LRC
state when we haven't initialized execlists at all...
Jesse
On 09/10/2015 02:56 PM, Yu Dai wrote:
> Jesse,
>
> > > > +/* Primary plane formats for gen >= 9 with NV12 */
> > > > +static const uint32_t skl_primary_formats_with_nv12[] = {
> > > > + DRM_FORMAT_C8,
> > > > + DRM_FORMAT_RGB565,
> > > > + DRM_FORMAT_XRGB,
> > > > + DRM_FORMAT_XBGR,
> > > > + DRM_FORMAT_ARGB8
That looks like it would, but I think it's still confusing to reference LRC
state when we haven't initialized execlists at all...
Jesse
On 09/10/2015 02:56 PM, Yu Dai wrote:
> Jesse,
>
> Will the patch here fix the issue? It should help other cases where
> LRC_PPHWSP_PN is referenced on non-ex
Jesse,
Will the patch here fix the issue? It should help other cases where
LRC_PPHWSP_PN is referenced on non-execlist / guc platforms.
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 4cc54b3..233a930 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/dr
On 09/10/2015 02:53 PM, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote:
>> On HSW at least (still testing other platforms, but should be harmless
>> elsewhere), the DSL reg reads back as 0 when read around vblank start
>> time. This ends up confusing the atomic
This avoids some bad register writes and generally feels more correct
than unconditionally trying to redirect interrupts and such.
References: https://bugs.freedesktop.org/show_bug.cgi?id=91777
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_gem.c | 29 -
1
On Thu, Sep 10, 2015 at 02:38:53PM -0700, Jesse Barnes wrote:
> On HSW at least (still testing other platforms, but should be harmless
> elsewhere), the DSL reg reads back as 0 when read around vblank start
> time. This ends up confusing the atomic start/end checking code, since
> it causes the up
Looks like this was introduced in:
commit d1675198ed1f21aec6e036336e4340c40b726497
Author: Alex Dai
Date: Wed Aug 12 15:43:43 2015 +0100
drm/i915: Integrate GuC-based command submission
This patch assumed LRC contexts and HWS layout, which is incorrect on
platforms without execlists. This
On HSW at least (still testing other platforms, but should be harmless
elsewhere), the DSL reg reads back as 0 when read around vblank start
time. This ends up confusing the atomic start/end checking code, since
it causes the update to appear as if it crossed a frame count boundary.
Avoid the prob
On Thu, Sep 10, 2015 at 09:06:23PM +, Konduru, Chandra wrote:
> > > +/* Primary plane formats for gen >= 9 with NV12 */
> > > +static const uint32_t skl_primary_formats_with_nv12[] = {
> > > + DRM_FORMAT_C8,
> > > + DRM_FORMAT_RGB565,
> > > + DRM_FORMAT_XRGB,
> > > + DRM_FORMAT_XBGR,
>
> > +/* Primary plane formats for gen >= 9 with NV12 */
> > +static const uint32_t skl_primary_formats_with_nv12[] = {
> > + DRM_FORMAT_C8,
> > + DRM_FORMAT_RGB565,
> > + DRM_FORMAT_XRGB,
> > + DRM_FORMAT_XBGR,
> > + DRM_FORMAT_ARGB,
> > + DRM_FORMAT_ABGR,
> > + DRM_FO
> > > + if (mode_cmd->modifier[1] == I915_FORMAT_MOD_Y_TILED
> &&
> > > + ((mode_cmd->offsets[1] / mode_cmd->pitches[1]) %
> 4)) {
> > > + DRM_DEBUG("tile-Y uv offset 0x%x isn't 4-line
> aligned\n",
> > > + mode_cmd->offsets[1]);
> > >
> > > > + if (obj->tiling_mode == I915_TILING_X &&
> > > > + !(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) {
> > >
> > > Your editor still seems to mess up the indentation in these cases. Can
> > > you try to fix that?
> >
> > If condition isn't fitting in a single
It's completely unused and there's really no reason for this:
- drm_framebuffer structures are invariant after creation, no need for
helpers to manipulate them.
- drm_framebuffer structures should just be embedded (and that's what
all the drivers do).
Stumbled over this since some folks are ap
On 09/10/2015 09:05 AM, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 08:34:23AM -0700, Jesse Barnes wrote:
>> I used these additional fields to track down the issue I saw on HSW.
>
> We already have the tracepoints with the scanline information. Not sure
> what extra this would give.
Also when
On Thu, Sep 10, 2015 at 09:34:59PM +0300, Ville Syrjälä wrote:
> On Wed, Sep 09, 2015 at 03:59:03PM -0700, Chandra Konduru wrote:
> > This patch adds NV12 as supported format to
> > intel_framebuffer_init and performs various checks.
> >
> > v2:
> > -Fix an issue in checks added (me)
> >
> > v3:
On Thu, Sep 10, 2015 at 07:14:58PM +, Konduru, Chandra wrote:
> > > + if (obj->tiling_mode == I915_TILING_X &&
> > > + !(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) {
> >
> > Your editor still seems to mess up the indentation in these cases. Can
> > you try to fix that?
>
On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
> + /* on skylake this is done by detaching scalers */
> + if (INTEL_INFO(dev)->gen == 9) {
> + skl_detach_scalers(crtc);
> +
> + if (pipe_config->pch_pfit.enabled)
> + skylake_pfit_enable(crtc);
>
On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
> This is done as a separate commit, to make it easier to revert
> when things break.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 -
> drivers/gpu/drm/i915/i915_params.c | 5 -
> drivers/gpu/drm/i915
On 09/10/2015 12:25 PM, Jesse Barnes wrote:
> On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
>> This might not have been set during boot, and when we preserve
>> the initial mode this can result in a black screen.
>>
>> Cc: Daniel Stone
>> Signed-off-by: Maarten Lankhorst
>> ---
>> drivers/gpu
On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
> The initial state is read out correctly and the state is atomic,
> so it's safe to preserve the fb without any hacks if it's suitable.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_fbdev.c | 3 ---
> 1 file changed, 3 d
On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
> It should really use the atomic state.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_fbdev.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
> b/driver
On 08/27/2015 06:44 AM, Maarten Lankhorst wrote:
> This might not have been set during boot, and when we preserve
> the initial mode this can result in a black screen.
>
> Cc: Daniel Stone
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 3 +++
> 1 file changed,
> > + if (obj->tiling_mode == I915_TILING_X &&
> > + !(mode_cmd->flags & DRM_MODE_FB_MODIFIERS)) {
>
> Your editor still seems to mess up the indentation in these cases. Can
> you try to fix that?
If condition isn't fitting in a single line, so continued in next line l
On 9/10/2015 8:15 PM, Daniel Vetter wrote:
On Thu, Sep 10, 2015 at 01:58:54AM +0530, Animesh Manna wrote:
On 9/2/2015 2:24 PM, Daniel Vetter wrote:
On Wed, Aug 26, 2015 at 07:40:54PM +0530, Animesh Manna wrote:
On 8/26/2015 6:40 PM, Daniel Vetter wrote:
On Wed, Aug 26, 2015 at 01:36:05AM +
On 9/10/2015 8:15 PM, Daniel Vetter wrote:
On Thu, Sep 10, 2015 at 01:58:54AM +0530, Animesh Manna wrote:
On 9/2/2015 2:24 PM, Daniel Vetter wrote:
On Wed, Aug 26, 2015 at 07:40:54PM +0530, Animesh Manna wrote:
On 8/26/2015 6:40 PM, Daniel Vetter wrote:
On Wed, Aug 26, 2015 at 01:36:05AM +
> > +static bool skl_need_scaling(int src_w, int src_h, int dst_w, int dst_h,
> > + unsigned int rotation, uint32_t pixel_format)
> > +{
> > + /* need a scaler when sizes doesn't match */
> > + if (src_w != dst_w || src_h != dst_h)
> > + return true;
> > +
> > + /* in case of 90/2
On Wed, Sep 09, 2015 at 03:59:03PM -0700, Chandra Konduru wrote:
> This patch adds NV12 as supported format to
> intel_framebuffer_init and performs various checks.
>
> v2:
> -Fix an issue in checks added (me)
>
> v3:
> -cosmetic update, split checks into two (Ville)
>
> v4:
> -Add stride alignm
On Fri, 2015-07-31 at 18:46 +0530, Goel, Akash wrote:
>
> On 7/22/2015 8:09 PM, Chris Wilson wrote:
> > On Wed, Jul 22, 2015 at 07:21:49PM +0530, ankitprasad.r.sha...@intel.com
> > wrote:
> >> static int
> >> i915_gem_shmem_pread(struct drm_device *dev,
> >> struct drm_i915_ge
On Fri, Sep 04, 2015 at 07:33:03PM -0700, Chandra Konduru wrote:
> This patch adds NV12 to list of supported formats for
> primary plane.
>
> v2:
> -Rebased (me)
>
> Signed-off-by: Chandra Konduru
> Testcase: igt/kms_nv12
> ---
> drivers/gpu/drm/i915/intel_display.c | 22 -
On 04/09/2015 12:59, Michel Thierry wrote:
When WaEnableForceRestoreInCtxtDescForVCS is required, it is only
safe to send new contexts if the last reported event is "active to
idle". Otherwise the same context can fully preempt itself because
lite-restore is disabled.
Testcase: igt/gem_concurren
On Fri, Sep 04, 2015 at 07:33:00PM -0700, Chandra Konduru wrote:
> This patch stages a scaler request when input format
> is NV12. The same scaler does both chroma-upsampling
> and resolution scaling as needed.
>
> v2:
> -Added helper function for need_scaling (Ville)
>
> v3:
> -Rebased to curren
On 04/09/2015 12:59, Michel Thierry wrote:
Also check for correct revision id in each Gen9 platform (SKL until B0
and BXT until A0).
Cc: Nick Hoath
Signed-off-by: Michel Thierry
---
drivers/gpu/drm/i915/intel_lrc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/
On Thu, Sep 10, 2015 at 06:30:20PM +0200, Daniel Vetter wrote:
> On Thu, Sep 10, 2015 at 07:20:11PM +0300, Ville Syrjälä wrote:
> > On Thu, Sep 10, 2015 at 07:13:46PM +0300, Ville Syrjälä wrote:
> > > On Thu, Sep 10, 2015 at 06:07:34PM +0200, Daniel Vetter wrote:
> > > > On Thu, Sep 10, 2015 at 06:
On Thu, Sep 10, 2015 at 06:31:02PM +0200, Daniel Vetter wrote:
> On Thu, Sep 10, 2015 at 06:43:26PM +0300, Ville Syrjälä wrote:
> > On Thu, Sep 10, 2015 at 04:07:58PM +0200, Maarten Lankhorst wrote:
> > > This function was still using the legacy state, convert it to atomic.
> > > While we're at it,
On Thu, Sep 10, 2015 at 06:43:26PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 04:07:58PM +0200, Maarten Lankhorst wrote:
> > This function was still using the legacy state, convert it to atomic.
> > While we're at it, fix the FIXME too and disable the primary plane.
> >
> > Signed-off-b
On Thu, Sep 10, 2015 at 09:17:23AM -0700, Jesse Barnes wrote:
> On 09/10/2015 09:11 AM, Ville Syrjälä wrote:
> > On Thu, Sep 10, 2015 at 08:34:22AM -0700, Jesse Barnes wrote:
> >> On HSW at least (still testing other platforms, but should be harmless
> >> elsewhere), the DSL reg reads back as 0 whe
On Thu, Sep 10, 2015 at 07:20:11PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 07:13:46PM +0300, Ville Syrjälä wrote:
> > On Thu, Sep 10, 2015 at 06:07:34PM +0200, Daniel Vetter wrote:
> > > On Thu, Sep 10, 2015 at 06:59:09PM +0300, ville.syrj...@linux.intel.com
> > > wrote:
> > > > From
On Tue, Sep 08, 2015 at 12:52:48PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Comment disagrees with the code which has changed a lot since
> it was documented.
>
> Signed-off-by: Tvrtko Ursulin
Applied, with the commit citation added for the patch which made this
comment obsolete
On Thu, Sep 10, 2015 at 07:13:46PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 06:07:34PM +0200, Daniel Vetter wrote:
> > On Thu, Sep 10, 2015 at 06:59:09PM +0300, ville.syrj...@linux.intel.com
> > wrote:
> > > From: Ville Syrjälä
> > >
> > > Add a .get_hw_state() method for planes, re
On 09/10/2015 09:11 AM, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 08:34:22AM -0700, Jesse Barnes wrote:
>> On HSW at least (still testing other platforms, but should be harmless
>> elsewhere), the DSL reg reads back as 0 when read around vblank start
>> time. This ends up confusing the atomic
On 09/10/2015 09:05 AM, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 08:34:23AM -0700, Jesse Barnes wrote:
>> I used these additional fields to track down the issue I saw on HSW.
>
> We already have the tracepoints with the scanline information. Not sure
> what extra this would give.
Saves the
On Thu, Sep 10, 2015 at 06:07:34PM +0200, Daniel Vetter wrote:
> On Thu, Sep 10, 2015 at 06:59:09PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Add a .get_hw_state() method for planes, returning true or false
> > depending on whether the plane is enabled. Use it to
On Thu, Sep 10, 2015 at 08:34:22AM -0700, Jesse Barnes wrote:
> On HSW at least (still testing other platforms, but should be harmless
> elsewhere), the DSL reg reads back as 0 when read around vblank start
> time. This ends up confusing the atomic start/end checking code, since
> it causes the up
On Thu, Sep 10, 2015 at 08:34:23AM -0700, Jesse Barnes wrote:
> I used these additional fields to track down the issue I saw on HSW.
We already have the tracepoints with the scanline information. Not sure
what extra this would give.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=91
On Thu, Sep 10, 2015 at 06:59:09PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Add a .get_hw_state() method for planes, returning true or false
> depending on whether the plane is enabled. Use it to populate the
> plane state 'visible' during state readout.
>
> Cc: Maar
From: Ville Syrjälä
The dotclock is often calculated in encoder .get_config(), so we
shouldn't copy the adjusted_mode to hwmode until we have read out the
dotclock.
Gets rid of some warnings like these:
[drm:drm_calc_timestamping_constants [drm]] *ERROR* crtc 21: Can't calculate
constants, dotc
From: Ville Syrjälä
Move the sprite/cursor plane disabling to occur in intel_sanitize_crtc()
where it belongs instead of doing it in intel_modeset_readout_hw_state().
The plane disabling was first added in
4cf0ebbd4fafbdf8e6431dbb315e5511c3efdc3b drm/i915: Rework plane readout.
I got the idea f
From: Ville Syrjälä
Add a .get_hw_state() method for planes, returning true or false
depending on whether the plane is enabled. Use it to populate the
plane state 'visible' during state readout.
Cc: Maarten Lankhorst
Cc: Patrik Jakobsson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/
From: Ville Syrjälä
intel_modeset_readout_hw_state() seems like the more appropriate place
for populating the scanline_offset and timestamping constants than
intel_sanitize_crtc() since they are basically part of the state we
read out.
Cc: Maarten Lankhorst
Cc: Patrik Jakobsson
Signed-off-by:
On Thu, Sep 10, 2015 at 04:08:05PM +0200, Maarten Lankhorst wrote:
> The crtc->active guards are no longer needed now that all state
> updates are outside the commit.
>
> Signed-off-by: Maarten Lankhorst
This looks actually complicated, so I'll punt. Merged most of the other
patches from your se
On Thu, Sep 10, 2015 at 04:08:04PM +0200, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst
Not sure this is worth it ... I'll punt for now. But if you add a bit of
justification that we could get rid of update_state_fb entirely it would
look better ;-)
-Daniel
> ---
> drivers/gpu/drm/
On Thu, Sep 10, 2015 at 05:46:12PM +0200, Daniel Vetter wrote:
> On Thu, Sep 10, 2015 at 04:08:03PM +0200, Maarten Lankhorst wrote:
> > In async mode crtc->config can be updated after the locks are released,
> > resulting in the wrong state being duplicated.
> >
> > Signed-off-by: Maarten Lankhors
On Thu, Sep 10, 2015 at 04:07:58PM +0200, Maarten Lankhorst wrote:
> This function was still using the legacy state, convert it to atomic.
> While we're at it, fix the FIXME too and disable the primary plane.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 26
On Thu, Sep 10, 2015 at 04:07:59PM +0200, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 13 +++--
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915
On Thu, Sep 10, 2015 at 04:08:03PM +0200, Maarten Lankhorst wrote:
> In async mode crtc->config can be updated after the locks are released,
> resulting in the wrong state being duplicated.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_atomic.c | 9 +
> 1 file c
On HSW at least (still testing other platforms, but should be harmless
elsewhere), the DSL reg reads back as 0 when read around vblank start
time. This ends up confusing the atomic start/end checking code, since
it causes the update to appear as if it crossed a frame count boundary.
Workaround tha
On Thu, Sep 10, 2015 at 04:08:01PM +0200, Maarten Lankhorst wrote:
> This should allow not running plane commit when the crtc is off.
> While the atomic helpers update those, crtc->x/y is only updated
> during modesets, and primary plane is updated after this function
> returns.
>
> Unfortunately
On Thu, Sep 10, 2015 at 04:07:58PM +0200, Maarten Lankhorst wrote:
> This function was still using the legacy state, convert it to atomic.
> While we're at it, fix the FIXME too and disable the primary plane.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 26
On Thu, Sep 10, 2015 at 04:08:00PM +0200, Maarten Lankhorst wrote:
> Unfortunately fbc still depends on legacy primary state, so
> it can't be killed off completely yet.
>
> Signed-off-by: Maarten Lankhorst
Wont it be enough that the helpers will update these legacy states for us?
And I didn't s
I used these additional fields to track down the issue I saw on HSW.
References: https://bugs.freedesktop.org/show_bug.cgi?id=91579
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_drv.h| 2 ++
drivers/gpu/drm/i915/intel_sprite.c | 16
2 files changed, 14 insertio
On Thu, Sep 10, 2015 at 08:20:28AM -0700, Jesse Barnes wrote:
> Use WARN_ONCE in a bunch of places and demote a message that would
> continually spam us.
>
> Signed-off-by: Jesse Barnes
I had something that could very well address the same problem(s):
http://lists.freedesktop.org/archives/int
On Thu, Sep 10, 2015 at 03:11:42PM +0100, Yetunde Adebisi wrote:
> This patch adds support for Backlight Control over the AUX channel for
> DP and eDP connectors. It allows the backlight of DP and eDP connected
> displays to be controlled from software using sysfs interface.
>
> The code first che
Thomas,
Sure thing. Here you go:
https://git.collabora.com/cgit/user/fedke.m/intel-gpu-tools.git/log/?h=drm_open_parameter_review05
-mf
On 09/09/2015 09:54 AM, Thomas Wood wrote:
On 14 August 2015 at 16:22, Micah Fedke wrote:
Changes since last version of patch:
Now using the core_* tes
Use WARN_ONCE in a bunch of places and demote a message that would
continually spam us.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_csr.c| 12 +--
drivers/gpu/drm/i915/intel_runtime_pm.c | 36 -
2 files changed, 24 insertions(+), 24
On Wed, Sep 09, 2015 at 06:54:17PM +, Rodrigo Vivi wrote:
> Reviewed-by: Rodrigo Vivi
>
> On Fri, Sep 4, 2015 at 6:37 AM Sonika Jindal
> wrote:
>
> > From: Shashank Sharma
> >
> > This patch adds the intel_connector initialized to intel_hdmi
> > display, during the init phase, just like th
On Wed, Sep 09, 2015 at 10:04:23AM -0700, Jesse Barnes wrote:
> [Adding Rob & Thierry]
>
> On 09/09/2015 09:36 AM, Smith, Gary K wrote:
> > I don't understand why this is an issue. Surely the fb is to describe
> > static state about the buffer, not dynamic state. The fb should be
> > created with
On Thu, Sep 10, 2015 at 04:35:57PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 10, 2015 at 01:07:30PM +, R, Durgadoss wrote:
> > Hi Rodrigo,
> >
> > I had to add this to get HDMI hotplug working on BXT.
> > As you might already know, we have the HPD pins A & B
> > swapped in BXT. And, we are usi
On Thu, Sep 10, 2015 at 01:07:18AM +, Jindal, Sonika wrote:
>
>
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Wednesday, September 9, 2015 8:48 PM
> To: Jindal, Sonika
> Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org;
On Thu, Sep 10, 2015 at 01:58:54AM +0530, Animesh Manna wrote:
>
>
> On 9/2/2015 2:24 PM, Daniel Vetter wrote:
> >On Wed, Aug 26, 2015 at 07:40:54PM +0530, Animesh Manna wrote:
> >>
> >>On 8/26/2015 6:40 PM, Daniel Vetter wrote:
> >>>On Wed, Aug 26, 2015 at 01:36:05AM +0530, Animesh Manna wrote:
This patch adds support for Backlight Control over the AUX channel for
DP and eDP connectors. It allows the backlight of DP and eDP connected
displays to be controlled from software using sysfs interface.
The code first checks if the DP/eDP display has the capability for
backlight control by readi
In async mode crtc->config can be updated after the locks are released,
resulting in the wrong state being duplicated.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomic.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_a
This series reduces the dependency on legacy state, and replaces it
with atomic state where possible.
Maarten Lankhorst (10):
drm/i915: Use atomic plane state in the primary plane update.
drm/i915: Use the plane state in intel_crtc_info.
drm/i915: Use the atomic state in intel_update_primary
Legacy state might not be updated any more.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/i915_debugfs.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 41629faaf939..72ae3472
With the conversion to atomic this cannot happen any more.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c
b/drivers/gpu/drm/i915/intel_atomic_plane.
Unfortunately fbc still depends on legacy primary state, so
it can't be killed off completely yet.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 4
drivers/gpu/drm/i915/intel_sprite.c | 2 --
2 files changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i
The crtc->active guards are no longer needed now that all state
updates are outside the commit.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 16 ++--
drivers/gpu/drm/i915/intel_sprite.c | 3 ---
2 files changed, 6 insertions(+), 13 deletions(-)
diff
This should allow not running plane commit when the crtc is off.
While the atomic helpers update those, crtc->x/y is only updated
during modesets, and primary plane is updated after this function
returns.
Unfortunately non-atomic watermarks and fbc still depend on this
state inside i915, so it has
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b809ee2a8678..f41ca558ba3b 100644
--- a/drivers/gpu/drm/i915/intel_d
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 80a98bffd5ba..33200403a5db 100644
--- a/drivers/gpu/drm/i915/intel_di
This function was still using the legacy state, convert it to atomic.
While we're at it, fix the FIXME too and disable the primary plane.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b68aa95c5460..bad22cb828c0 100644
--- a/drivers/gpu/drm/i9
On Wed, Aug 05, 2015 at 04:46:38PM +0200, Daniel Vetter wrote:
> If we shut down the crtc we might run into WM consistency checks which
> fail because we haven't yet read out the WM state. So do that before
> we sanitized the state.
>
> This fixes a WARNING in the ilk wm code which assumes that le
On Thu, Sep 10, 2015 at 01:07:30PM +, R, Durgadoss wrote:
> Hi Rodrigo,
>
> I had to add this to get HDMI hotplug working on BXT.
> As you might already know, we have the HPD pins A & B
> swapped in BXT. And, we are using HPD_PORT_A as
> 'intel_encoder->hpd_pin' for HDMI on port B.
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