On Tue, 29 Dec 2015, Chris Wilson wrote:
> On Tue, Dec 29, 2015 at 06:59:57PM +, Dave Gordon wrote:
>> In the discussions around commit 373701b1 (Jani Nikula)
>> drm: fix potential dangling else problems in for_each_ macros
>> Daniel Vetter mooted the idea of a for_each_engine(ring, dev_pr
On Tue, 29 Dec 2015, Insu Yun wrote:
> Signed-off-by: Insu Yun
> ---
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index a5e99ac..4e279dd 100644
Hi Chris,
With below commit, idle frequency is made RPn (HW Min).
Why are we not keeping it at RPe (Efficient Frequency)?
My understanding was to set Rpe on idle so that when GPU is out of RC6
it can start operating at efficient frequency.
commit aed242ff7ebb697e4dff912bd4dc7ec7192f7581
Author
On Wed, Dec 30, 2015 at 02:51:27PM +0530, Kamble, Sagar A wrote:
> Hi Chris,
>
> With below commit, idle frequency is made RPn (HW Min).
> Why are we not keeping it at RPe (Efficient Frequency)?
> My understanding was to set Rpe on idle so that when GPU is out of
> RC6 it can start operating at ef
On Wed, 30 Dec 2015, Ben Widawsky wrote:
> Signed-off-by: Ben Widawsky
Pushed to drm-intel-next-queued, thanks for the patch.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c
> b/d
On Thu, 19 Nov 2015, Daniel Vetter wrote:
> On Thu, Nov 19, 2015 at 11:41:07AM +0200, Mika Kuoppala wrote:
>> Daniel Vetter writes:
>>
>> > On Mon, Nov 02, 2015 at 11:25:08AM +0200, Mika Kuoppala wrote:
>> >> Gen9 has had demonstrated cases where forcing a not ready gpu
>> >> into reset has caus
Hello Chris!
The question is: why this change in behavior was made?
On previous platforms Gfx Turbo frequency selection range in driver was in
between Rpe & Rp0. Since Rpe is the possible Fmax at Vmin, it was used as the
starting frequency once driver booted and any value lower than that was n
On Wed, Dec 30, 2015 at 09:50:15AM +, Szwichtenberg, Radoslaw wrote:
> Hello Chris!
>
> The question is: why this change in behavior was made?
To take a defensive position to ensure minimum power consumption.
The GPU is idle, the driver has no work for it to do, it should be power
gated, but
Turbo frequency range is Rpe to Rp0 when GPU is active as, on workload
submission frequency is taken to Rpe.
Does the HW require us to drop to RPn before entering RC6?
If we can enter RC6 even with other frequencies I think we can keep
running at Rpe on Idle.
Only benefit of running at Rpn mi
On Wed, Dec 30, 2015 at 04:09:46PM +0530, Kamble, Sagar A wrote:
>Turbo frequency range is Rpe to Rp0 when GPU is active as, on workload
>submission frequency is taken to Rpe.
>
>Does the HW require us to drop to RPn before entering RC6?
>If we can enter RC6 even with other frequen
On Wed, 23 Dec 2015, Gary Wang wrote:
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> b/drivers/gpu/drm/i915/intel_hdmi.c
> old mode 100644
> new mode 100755
Please pay more attention to not changing the file permissions.
Thanks,
Jani.
--
Jani Nikula, Intel Open Source Technology Center
__
On Tue, 29 Dec 2015, Libin Yang wrote:
> Sorry to interrupt.
>
> I got this email sent to me. It seems one of my patch causes this
> issue? Does anyone know how to find which patch causes this issue from
> the below message? Thanks.
Some of the tests don't give stable results yet. We're working
Hi,
On ti, 2015-12-29 at 12:55 +0200, Gabriel Feceoru wrote:
> This fixes an issue added with: "1f814da drm/i915: add support for
> checking
> if we hold an RPM reference", noticed while running
> drv_module_reload_basic.
>
> WARNING: CPU: 1 PID: 2032 at drivers/gpu/drm/i915/intel_drv.h:1446
> ge
On 12/30/2015 05:27 PM, Jani Nikula wrote:
On Wed, 23 Dec 2015, Gary Wang wrote:
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
old mode 100644
new mode 100755
Please pay more attention to not changing the file permissions.
Yeah, and the new permissions
The drm_dp_mst_topology_cbs structures are never modified, so declare them
as const.
Done with the help of Coccinelle.
Signed-off-by: Julia Lawall
---
drivers/gpu/drm/i915/intel_dp_mst.c|2 +-
drivers/gpu/drm/radeon/radeon_dp_mst.c |2 +-
include/drm/drm_dp_mst_helper.h|
Broxton-specific panel power sequencing was added in commit
commit b0a08bec96318be54db97c3f0b9e37b52561f9ea
Author: Vandana Kannan
Date: Thu Jun 18 11:00:55 2015 +0530
drm/i915/bxt: eDP Panel Power sequencing
As noted in that commit, Broxton has two sets of
When I submitted the PPS patch in April, I got an input from Jani to not
make changes in i915_suspend.c as it was to become obsolete. Below mail
for your reference.
Jani,
Does your initial comment still hold good?
On Thu, 30 Apr 2015, Vandana Kannan wrote:
> Changes based on future platform r
== Summary ==
Built on 79686f613b3955a4ed09cee936e7f70ec4e61b67 drm-intel-nightly:
2015y-12m-30d-11h-59m-54s UTC integration manifest
Test kms_flip:
Subgroup basic-flip-vs-dpms:
dmesg-warn -> PASS (ilk-hp8440p)
Subgroup basic-flip-vs-modeset:
== Summary ==
Built on 79686f613b3955a4ed09cee936e7f70ec4e61b67 drm-intel-nightly:
2015y-12m-30d-11h-59m-54s UTC integration manifest
Test gem_ctx_param_basic:
Subgroup basic:
pass -> DMESG-WARN (skl-i7k-2)
Subgroup invalid-param-set:
pass
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